From d95b03236dcc64177f107fc20c540cd4d82a7322 Mon Sep 17 00:00:00 2001
From: Jeff Rizzo <riz@tastylime.net>
Date: Sat, 19 Dec 2015 13:54:26 -0800
Subject: [PATCH 01/18] Update rt2860reg.h to OpenBSD rev 1.32

---
 sys/dev/ic/rt2860reg.h | 615 +++++++++++++++++++++++++++++++++++++++++++++----
 1 file changed, 565 insertions(+), 50 deletions(-)

diff --git a/sys/dev/ic/rt2860reg.h b/sys/dev/ic/rt2860reg.h
index 007b45b..a8a0ddb 100644
--- a/sys/dev/ic/rt2860reg.h
+++ b/sys/dev/ic/rt2860reg.h
@@ -1,5 +1,5 @@
 /*	$NetBSD: rt2860reg.h,v 1.1 2012/05/30 14:30:35 nonaka Exp $	*/
-/*	$OpenBSD: rt2860reg.h,v 1.30 2010/05/10 18:17:10 damien Exp $	*/
+/*	$OpenBSD: rt2860reg.h,v 1.32 2014/05/24 10:10:17 stsp Exp $	*/
 
 /*-
  * Copyright (c) 2007
@@ -81,6 +81,9 @@
 #define RT3070_LDO_CFG0			0x05d4
 #define RT3070_GPIO_SWITCH		0x05dc
 
+/* RT5592 registers */
+#define RT5592_DEBUG_INDEX		0x05e8
+
 /* MAC registers */
 #define RT2860_ASIC_VER_ID		0x1000
 #define RT2860_MAC_SYS_CTRL		0x1004
@@ -205,6 +208,7 @@
 #define RT2860_H2M_MAILBOX		0x7010
 #define RT2860_H2M_MAILBOX_CID		0x7014
 #define RT2860_H2M_MAILBOX_STATUS	0x701c
+#define RT2860_H2M_INTSRC		0x7024
 #define RT2860_H2M_BBPAGENT		0x7028
 #define RT2860_BCN_BASE(vap)		(0x7800 + (vap) * 512)
 
@@ -256,10 +260,10 @@
 #define RT2860_TX_DMA_EN		(1 << 0)
 
 /* possible flags for register DELAY_INT_CFG */
-#define RT2860_TXDLY_INT_EN		(1 << 31)
+#define RT2860_TXDLY_INT_EN		(1U << 31)
 #define RT2860_TXMAX_PINT_SHIFT		24
 #define RT2860_TXMAX_PTIME_SHIFT	16
-#define RT2860_RXDLY_INT_EN		(1 << 15)
+#define RT2860_RXDLY_INT_EN		(1U << 15)
 #define RT2860_RXMAX_PINT_SHIFT		8
 #define RT2860_RXMAX_PTIME_SHIFT	0
 
@@ -268,16 +272,16 @@
 #define RT2860_GPIO_O_SHIFT	0
 
 /* possible flags for register USB_DMA_CFG */
-#define RT2860_USB_TX_BUSY		(1 << 31)
-#define RT2860_USB_RX_BUSY		(1 << 30)
+#define RT2860_USB_TX_BUSY		(1U << 31)
+#define RT2860_USB_RX_BUSY		(1U << 30)
 #define RT2860_USB_EPOUT_VLD_SHIFT	24
-#define RT2860_USB_TX_EN		(1 << 23)
-#define RT2860_USB_RX_EN		(1 << 22)
-#define RT2860_USB_RX_AGG_EN		(1 << 21)
-#define RT2860_USB_TXOP_HALT		(1 << 20)
-#define RT2860_USB_TX_CLEAR		(1 << 19)
-#define RT2860_USB_PHY_WD_EN		(1 << 16)
-#define RT2860_USB_PHY_MAN_RST		(1 << 15)
+#define RT2860_USB_TX_EN		(1U << 23)
+#define RT2860_USB_RX_EN		(1U << 22)
+#define RT2860_USB_RX_AGG_EN		(1U << 21)
+#define RT2860_USB_TXOP_HALT		(1U << 20)
+#define RT2860_USB_TX_CLEAR		(1U << 19)
+#define RT2860_USB_PHY_WD_EN		(1U << 16)
+#define RT2860_USB_PHY_MAN_RST		(1U << 15)
 #define RT2860_USB_RX_AGG_LMT(x)	((x) << 8)	/* in unit of 1KB */
 #define RT2860_USB_RX_AGG_TO(x)		((x) & 0xff)	/* in unit of 33ns */
 
@@ -368,9 +372,9 @@
 #define RT2860_TX0Q_PCNT_MASK	0x000000ff
 
 /* possible flags for register CAP_CTRL */
-#define RT2860_CAP_ADC_FEQ		(1 << 31)
-#define RT2860_CAP_START		(1 << 30)
-#define RT2860_MAN_TRIG			(1 << 29)
+#define RT2860_CAP_ADC_FEQ		(1U << 31)
+#define RT2860_CAP_START		(1U << 30)
+#define RT2860_MAN_TRIG			(1U << 29)
 #define RT2860_TRIG_OFFSET_SHIFT	16
 #define RT2860_START_ADDR_SHIFT		0
 
@@ -379,13 +383,16 @@
 #define RT3070_RF_WRITE		(1 << 16)
 
 /* possible flags for register EFUSE_CTRL */
-#define RT3070_SEL_EFUSE	(1 << 31)
-#define RT3070_EFSROM_KICK	(1 << 30)
+#define RT3070_SEL_EFUSE	(1U << 31)
+#define RT3070_EFSROM_KICK	(1U << 30)
 #define RT3070_EFSROM_AIN_MASK	0x03ff0000
 #define RT3070_EFSROM_AIN_SHIFT	16
 #define RT3070_EFSROM_MODE_MASK	0x000000c0
 #define RT3070_EFUSE_AOUT_MASK	0x0000003f
 
+/* possible flag for register DEBUG_INDEX */
+#define RT5592_SEL_XTAL		(1U << 31)
+
 /* possible flags for register MAC_SYS_CTRL */
 #define RT2860_RX_TS_EN		(1 << 7)
 #define RT2860_WLAN_HALT_EN	(1 << 6)
@@ -418,9 +425,9 @@
 #define RT2860_BBP_DATA_SHIFT		0
 
 /* possible flags for register RF_CSR_CFG0 */
-#define RT2860_RF_REG_CTRL		(1 << 31)
-#define RT2860_RF_LE_SEL1		(1 << 30)
-#define RT2860_RF_LE_STBY		(1 << 29)
+#define RT2860_RF_REG_CTRL		(1U << 31)
+#define RT2860_RF_LE_SEL1		(1U << 30)
+#define RT2860_RF_LE_STBY		(1U << 29)
 #define RT2860_RF_REG_WIDTH_SHIFT	24
 #define RT2860_RF_REG_0_SHIFT		0
 
@@ -453,9 +460,9 @@
 #define RT2860_SLOT_TIME		0
 
 /* possible flags for register NAV_TIME_CFG */
-#define RT2860_NAV_UPD			(1 << 31)
+#define RT2860_NAV_UPD			(1U << 31)
 #define RT2860_NAV_UPD_VAL_SHIFT	16
-#define RT2860_NAV_CLR_EN		(1 << 15)
+#define RT2860_NAV_CLR_EN		(1U << 15)
 #define RT2860_NAV_TIMER_SHIFT		0
 
 /* possible flags for register CH_TIME_CFG */
@@ -507,37 +514,37 @@
 #define RT2860_WAKEUP_LEAD_TIME_SHIFT	0
 
 /* possible flags for register TX_PIN_CFG */
-#define RT3593_LNA_PE_G2_POL	(1 << 31)
-#define RT3593_LNA_PE_A2_POL	(1 << 30)
-#define RT3593_LNA_PE_G2_EN	(1 << 29)
-#define RT3593_LNA_PE_A2_EN	(1 << 28)
+#define RT3593_LNA_PE_G2_POL	(1U << 31)
+#define RT3593_LNA_PE_A2_POL	(1U << 30)
+#define RT3593_LNA_PE_G2_EN	(1U << 29)
+#define RT3593_LNA_PE_A2_EN	(1U << 28)
 #define RT3593_LNA_PE2_EN	(RT3593_LNA_PE_A2_EN | RT3593_LNA_PE_G2_EN)
-#define RT3593_PA_PE_G2_POL	(1 << 27)
-#define RT3593_PA_PE_A2_POL	(1 << 26)
-#define RT3593_PA_PE_G2_EN	(1 << 25)
-#define RT3593_PA_PE_A2_EN	(1 << 24)
-#define RT2860_TRSW_POL		(1 << 19)
-#define RT2860_TRSW_EN		(1 << 18)
-#define RT2860_RFTR_POL		(1 << 17)
-#define RT2860_RFTR_EN		(1 << 16)
-#define RT2860_LNA_PE_G1_POL	(1 << 15)
-#define RT2860_LNA_PE_A1_POL	(1 << 14)
-#define RT2860_LNA_PE_G0_POL	(1 << 13)
-#define RT2860_LNA_PE_A0_POL	(1 << 12)
-#define RT2860_LNA_PE_G1_EN	(1 << 11)
-#define RT2860_LNA_PE_A1_EN	(1 << 10)
+#define RT3593_PA_PE_G2_POL	(1U << 27)
+#define RT3593_PA_PE_A2_POL	(1U << 26)
+#define RT3593_PA_PE_G2_EN	(1U << 25)
+#define RT3593_PA_PE_A2_EN	(1U << 24)
+#define RT2860_TRSW_POL		(1U << 19)
+#define RT2860_TRSW_EN		(1U << 18)
+#define RT2860_RFTR_POL		(1U << 17)
+#define RT2860_RFTR_EN		(1U << 16)
+#define RT2860_LNA_PE_G1_POL	(1U << 15)
+#define RT2860_LNA_PE_A1_POL	(1U << 14)
+#define RT2860_LNA_PE_G0_POL	(1U << 13)
+#define RT2860_LNA_PE_A0_POL	(1U << 12)
+#define RT2860_LNA_PE_G1_EN	(1U << 11)
+#define RT2860_LNA_PE_A1_EN	(1U << 10)
 #define RT2860_LNA_PE1_EN	(RT2860_LNA_PE_A1_EN | RT2860_LNA_PE_G1_EN)
-#define RT2860_LNA_PE_G0_EN	(1 <<  9)
-#define RT2860_LNA_PE_A0_EN	(1 <<  8)
+#define RT2860_LNA_PE_G0_EN	(1U <<  9)
+#define RT2860_LNA_PE_A0_EN	(1U <<  8)
 #define RT2860_LNA_PE0_EN	(RT2860_LNA_PE_A0_EN | RT2860_LNA_PE_G0_EN)
-#define RT2860_PA_PE_G1_POL	(1 <<  7)
-#define RT2860_PA_PE_A1_POL	(1 <<  6)
-#define RT2860_PA_PE_G0_POL	(1 <<  5)
-#define RT2860_PA_PE_A0_POL	(1 <<  4)
-#define RT2860_PA_PE_G1_EN	(1 <<  3)
-#define RT2860_PA_PE_A1_EN	(1 <<  2)
-#define RT2860_PA_PE_G0_EN	(1 <<  1)
-#define RT2860_PA_PE_A0_EN	(1 <<  0)
+#define RT2860_PA_PE_G1_POL	(1U <<  7)
+#define RT2860_PA_PE_A1_POL	(1U <<  6)
+#define RT2860_PA_PE_G0_POL	(1U <<  5)
+#define RT2860_PA_PE_A0_POL	(1U <<  4)
+#define RT2860_PA_PE_G1_EN	(1U <<  3)
+#define RT2860_PA_PE_A1_EN	(1U <<  2)
+#define RT2860_PA_PE_G0_EN	(1U <<  1)
+#define RT2860_PA_PE_A0_EN	(1U <<  0)
 
 /* possible flags for register TX_BAND_CFG */
 #define RT2860_5G_BAND_SEL_N	(1 << 2)
@@ -697,6 +704,7 @@
 
 /* possible flags for RT3020 RF register 1 */
 #define RT3070_RF_BLOCK	(1 << 0)
+#define RT3070_PLL_PD	(1 << 1)
 #define RT3070_RX0_PD	(1 << 2)
 #define RT3070_TX0_PD	(1 << 3)
 #define RT3070_RX1_PD	(1 << 4)
@@ -735,6 +743,9 @@
 /* possible flags for RT3053 RF register 6 */
 #define RT3593_VCO_IC	(1 << 6)
 
+/* possible flags for RT3053 RF register 18 */
+#define RT3593_AUTOTUNE_BYPASS	(1 << 6)
+
 /* possible flags for RT3053 RF register 20 */
 #define RT3593_LDO_PLL_VC_MASK	0x0e
 #define RT3593_LDO_RF_VC_MASK	0xe0
@@ -743,9 +754,28 @@
 #define RT3593_CP_IC_MASK	0xe0
 #define RT3593_CP_IC_SHIFT	5
 
+/* possible flags for RT5390 RF register 38. */
+#define RT5390_RX_LO1	(1 << 5)
+
+/* possible flags for RT5390 RF register 39. */
+#define RT5390_RX_LO2	(1 << 7)
+
 /* possible flags for RT3053 RF register 46 */
 #define RT3593_RX_CTB	(1 << 5)
 
+/* possible flags for RT3053 RF register 50 */
+#define RT3593_TX_LO2	(1 << 4)
+
+/* possible flags for RT3053 RF register 51 */
+#define RT3593_TX_LO1	(1 << 4)
+
+/* Possible flags for RT5390 BBP register 4. */
+#define RT5390_MAC_IF_CTRL	(1 << 6)
+
+/* possible flags for RT5390 BBP register 105. */
+#define RT5390_MLD			(1 << 2)
+#define RT5390_EN_SIG_MODULATION	(1 << 3)
+
 #define RT3090_DEF_LNA	10
 
 /* RT2860 TX descriptor */
@@ -892,6 +922,9 @@ struct rt2860_rxwi {
 #define RT3070_RF_3052	9	/* dual-band 2T2R */
 #define RT3070_RF_3320	11	/* 1T1R */
 #define RT3070_RF_3053	13	/* dual-band 3T3R */
+#define RT5592_RF_5592	0x000f	/* dual-band 2T2R */
+#define RT5390_RF_5370	0x5370	/* 1T1R */
+#define RT5390_RF_5372	0x5372	/* 2T2R */
 
 /* USB commands for RT2870 only */
 #define RT2870_RESET		1
@@ -939,6 +972,47 @@ struct rt2860_rxwi {
 #define RT2860_EEPROM_BBP_BASE		0x78
 #define RT3071_EEPROM_RF_BASE		0x82
 
+/* EEPROM registers for RT3593. */
+#define RT3593_EEPROM_FREQ_LEDS		0x21
+#define RT3593_EEPROM_FREQ		0x22
+#define RT3593_EEPROM_LED1		0x22
+#define RT3593_EEPROM_LED2		0x23
+#define RT3593_EEPROM_LED3		0x24
+#define RT3593_EEPROM_LNA		0x26
+#define RT3593_EEPROM_LNA_5GHZ		0x27
+#define RT3593_EEPROM_RSSI1_2GHZ	0x28
+#define RT3593_EEPROM_RSSI2_2GHZ	0x29
+#define RT3593_EEPROM_RSSI1_5GHZ	0x2a
+#define RT3593_EEPROM_RSSI2_5GHZ	0x2b
+#define RT3593_EEPROM_PWR2GHZ_BASE1	0x30
+#define RT3593_EEPROM_PWR2GHZ_BASE2	0x37
+#define RT3593_EEPROM_PWR2GHZ_BASE3	0x3e
+#define RT3593_EEPROM_PWR5GHZ_BASE1	0x4b
+#define RT3593_EEPROM_PWR5GHZ_BASE2	0x65
+#define RT3593_EEPROM_PWR5GHZ_BASE3	0x7f
+
+/*
+ * EEPROM IQ calibration.
+ */
+#define RT5390_EEPROM_IQ_GAIN_CAL_TX0_2GHZ			0x130
+#define RT5390_EEPROM_IQ_PHASE_CAL_TX0_2GHZ			0x131
+#define RT5390_EEPROM_IQ_GAIN_CAL_TX1_2GHZ			0x133
+#define RT5390_EEPROM_IQ_PHASE_CAL_TX1_2GHZ			0x134
+#define RT5390_EEPROM_RF_IQ_COMPENSATION_CTL			0x13c
+#define RT5390_EEPROM_RF_IQ_IMBALANCE_COMPENSATION_CTL		0x13d
+#define RT5390_EEPROM_IQ_GAIN_CAL_TX0_CH36_TO_CH64_5GHZ		0x144
+#define RT5390_EEPROM_IQ_PHASE_CAL_TX0_CH36_TO_CH64_5GHZ	0x145
+#define RT5390_EEPROM_IQ_GAIN_CAL_TX0_CH100_TO_CH138_5GHZ	0x146
+#define RT5390_EEPROM_IQ_PHASE_CAL_TX0_CH100_TO_CH138_5GHZ	0x147
+#define RT5390_EEPROM_IQ_GAIN_CAL_TX0_CH140_TO_CH165_5GHZ	0x148
+#define RT5390_EEPROM_IQ_PHASE_CAL_TX0_CH140_TO_CH165_5GHZ	0x149
+#define RT5390_EEPROM_IQ_GAIN_CAL_TX1_CH36_TO_CH64_5GHZ		0x14a
+#define RT5390_EEPROM_IQ_PHASE_CAL_TX1_CH36_TO_CH64_5GHZ	0x14b
+#define RT5390_EEPROM_IQ_GAIN_CAL_TX1_CH100_TO_CH138_5GHZ	0x14c
+#define RT5390_EEPROM_IQ_PHASE_CAL_TX1_CH100_TO_CH138_5GHZ	0x14d
+#define RT5390_EEPROM_IQ_GAIN_CAL_TX1_CH140_TO_CH165_5GHZ	0x14e
+#define RT5390_EEPROM_IQ_PHASE_CAL_TX1_CH140_TO_CH165_5GHZ	0x14f
+
 #define RT2860_RIDX_CCK1	 0
 #define RT2860_RIDX_CCK11	 3
 #define RT2860_RIDX_OFDM6	 4
@@ -1085,6 +1159,62 @@ static const struct rt2860_rate {
 	{ 105, 0x05 },	\
 	{ 106, 0x35 }
 
+#define RT5390_DEF_BBP	\
+	{  31, 0x08 },	\
+	{  65, 0x2c },	\
+	{  66, 0x38 },	\
+	{  68, 0x0b },	\
+	{  69, 0x0d },	\
+	{  70, 0x06 },	\
+	{  73, 0x13 },	\
+	{  75, 0x46 },	\
+	{  76, 0x28 },	\
+	{  77, 0x59 },	\
+	{  81, 0x37 },	\
+	{  82, 0x62 },	\
+	{  83, 0x7a },	\
+	{  84, 0x9a },	\
+	{  86, 0x38 },	\
+	{  91, 0x04 },	\
+	{  92, 0x02 },	\
+	{ 103, 0xc0 },	\
+	{ 104, 0x92 },	\
+	{ 105, 0x3c },	\
+	{ 106, 0x03 },	\
+	{ 128, 0x12 }
+
+#define RT5592_DEF_BBP	\
+	{  20, 0x06 },	\
+	{  31, 0x08 },	\
+	{  65, 0x2c },	\
+	{  66, 0x38 },	\
+	{  68, 0xdd },	\
+	{  69, 0x1a },	\
+	{  70, 0x05 },	\
+	{  73, 0x13 },	\
+	{  74, 0x0f },	\
+	{  75, 0x4f },	\
+	{  76, 0x28 },	\
+	{  77, 0x59 },	\
+	{  81, 0x37 },	\
+	{  82, 0x62 },	\
+	{  83, 0x6a },	\
+	{  84, 0x9a },	\
+	{  86, 0x38 },	\
+	{  88, 0x90 },	\
+	{  91, 0x04 },	\
+	{  92, 0x02 },	\
+	{  95, 0x9a },	\
+	{  98, 0x12 },	\
+	{ 103, 0xc0 },	\
+	{ 104, 0x92 },	\
+	{ 105, 0x3c },	\
+	{ 106, 0x35 },	\
+	{ 128, 0x12 },	\
+	{ 134, 0xd0 },	\
+	{ 135, 0xf6 },	\
+	{ 137, 0x0f }
+
 /*
  * Default settings for RF registers; values derived from the reference driver.
  */
@@ -1198,6 +1328,116 @@ static const struct rt2860_rate {
 	{ 0x61, 0,  7 },	\
 	{ 0x61, 0,  9 }
 
+#define RT5592_RF5592_20MHZ	\
+	{ 0x1e2,  4, 10, 3 },	\
+	{ 0x1e3,  4, 10, 3 },	\
+	{ 0x1e4,  4, 10, 3 },	\
+	{ 0x1e5,  4, 10, 3 },	\
+	{ 0x1e6,  4, 10, 3 },	\
+	{ 0x1e7,  4, 10, 3 },	\
+	{ 0x1e8,  4, 10, 3 },	\
+	{ 0x1e9,  4, 10, 3 },	\
+	{ 0x1ea,  4, 10, 3 },	\
+	{ 0x1eb,  4, 10, 3 },	\
+	{ 0x1ec,  4, 10, 3 },	\
+	{ 0x1ed,  4, 10, 3 },	\
+	{ 0x1ee,  4, 10, 3 },	\
+	{ 0x1f0,  8, 10, 3 },	\
+	{  0xac,  8, 12, 1 },	\
+	{  0xad,  0, 12, 1 },	\
+	{  0xad,  4, 12, 1 },	\
+	{  0xae,  0, 12, 1 },	\
+	{  0xae,  4, 12, 1 },	\
+	{  0xae,  8, 12, 1 },	\
+	{  0xaf,  4, 12, 1 },	\
+	{  0xaf,  8, 12, 1 },	\
+	{  0xb0,  0, 12, 1 },	\
+	{  0xb0,  8, 12, 1 },	\
+	{  0xb1,  0, 12, 1 },	\
+	{  0xb1,  4, 12, 1 },	\
+	{  0xb7,  4, 12, 1 },	\
+	{  0xb7,  8, 12, 1 },	\
+	{  0xb8,  0, 12, 1 },	\
+	{  0xb8,  8, 12, 1 },	\
+	{  0xb9,  0, 12, 1 },	\
+	{  0xb9,  4, 12, 1 },	\
+	{  0xba,  0, 12, 1 },	\
+	{  0xba,  4, 12, 1 },	\
+	{  0xba,  8, 12, 1 },	\
+	{  0xbb,  4, 12, 1 },	\
+	{  0xbb,  8, 12, 1 },	\
+	{  0xbc,  0, 12, 1 },	\
+	{  0xbc,  8, 12, 1 },	\
+	{  0xbd,  0, 12, 1 },	\
+	{  0xbd,  4, 12, 1 },	\
+	{  0xbe,  0, 12, 1 },	\
+	{  0xbf,  6, 12, 1 },	\
+	{  0xbf, 10, 12, 1 },	\
+	{  0xc0,  2, 12, 1 },	\
+	{  0xc0, 10, 12, 1 },	\
+	{  0xc1,  2, 12, 1 },	\
+	{  0xc1,  6, 12, 1 },	\
+	{  0xc2,  2, 12, 1 },	\
+	{  0xa4,  0, 12, 1 },	\
+	{  0xa4,  4, 12, 1 },	\
+	{  0xa5,  8, 12, 1 },	\
+	{  0xa6,  0, 12, 1 }
+
+#define RT5592_RF5592_40MHZ	\
+	{ 0xf1,  2, 10, 3 },	\
+	{ 0xf1,  7, 10, 3 },	\
+	{ 0xf2,  2, 10, 3 },	\
+	{ 0xf2,  7, 10, 3 },	\
+	{ 0xf3,  2, 10, 3 },	\
+	{ 0xf3,  7, 10, 3 },	\
+	{ 0xf4,  2, 10, 3 },	\
+	{ 0xf4,  7, 10, 3 },	\
+	{ 0xf5,  2, 10, 3 },	\
+	{ 0xf5,  7, 10, 3 },	\
+	{ 0xf6,  2, 10, 3 },	\
+	{ 0xf6,  7, 10, 3 },	\
+	{ 0xf7,  2, 10, 3 },	\
+	{ 0xf8,  4, 10, 3 },	\
+	{ 0x56,  4, 12, 1 },	\
+	{ 0x56,  6, 12, 1 },	\
+	{ 0x56,  8, 12, 1 },	\
+	{ 0x57,  0, 12, 1 },	\
+	{ 0x57,  2, 12, 1 },	\
+	{ 0x57,  4, 12, 1 },	\
+	{ 0x57,  8, 12, 1 },	\
+	{ 0x57, 10, 12, 1 },	\
+	{ 0x58,  0, 12, 1 },	\
+	{ 0x58,  4, 12, 1 },	\
+	{ 0x58,  6, 12, 1 },	\
+	{ 0x58,  8, 12, 1 },	\
+	{ 0x5b,  8, 12, 1 },	\
+	{ 0x5b, 10, 12, 1 },	\
+	{ 0x5c,  0, 12, 1 },	\
+	{ 0x5c,  4, 12, 1 },	\
+	{ 0x5c,  6, 12, 1 },	\
+	{ 0x5c,  8, 12, 1 },	\
+	{ 0x5d,  0, 12, 1 },	\
+	{ 0x5d,  2, 12, 1 },	\
+	{ 0x5d,  4, 12, 1 },	\
+	{ 0x5d,  8, 12, 1 },	\
+	{ 0x5d, 10, 12, 1 },	\
+	{ 0x5e,  0, 12, 1 },	\
+	{ 0x5e,  4, 12, 1 },	\
+	{ 0x5e,  6, 12, 1 },	\
+	{ 0x5e,  8, 12, 1 },	\
+	{ 0x5f,  0, 12, 1 },	\
+	{ 0x5f,  9, 12, 1 },	\
+	{ 0x5f, 11, 12, 1 },	\
+	{ 0x60,  1, 12, 1 },	\
+	{ 0x60,  5, 12, 1 },	\
+	{ 0x60,  7, 12, 1 },	\
+	{ 0x60,  9, 12, 1 },	\
+	{ 0x61,  1, 12, 1 },	\
+	{ 0x52,  0, 12, 1 },	\
+	{ 0x52,  4, 12, 1 },	\
+	{ 0x52,  8, 12, 1 },	\
+	{ 0x53,  0, 12, 1 }
+
 #define RT3070_DEF_RF	\
 	{  4, 0x40 },	\
 	{  5, 0x03 },	\
@@ -1251,3 +1491,278 @@ static const struct rt2860_rate {
 	{ 29, 0x9b },	\
 	{ 30, 0x09 },	\
 	{ 31, 0x10 }
+
+#define RT3593_DEF_RF	\
+	{  1, 0x03 },	\
+	{  3, 0x80 },	\
+	{  5, 0x00 },	\
+	{  6, 0x40 },	\
+	{  8, 0xf1 },	\
+	{  9, 0x02 },	\
+	{ 10, 0xd3 },	\
+	{ 11, 0x40 },	\
+	{ 12, 0x4e },	\
+	{ 13, 0x12 },	\
+	{ 18, 0x40 },	\
+	{ 22, 0x20 },	\
+	{ 30, 0x10 },	\
+	{ 31, 0x80 },	\
+	{ 32, 0x78 },	\
+	{ 33, 0x3b },	\
+	{ 34, 0x3c },	\
+	{ 35, 0xe0 },	\
+	{ 38, 0x86 },	\
+	{ 39, 0x23 },	\
+	{ 44, 0xd3 },	\
+	{ 45, 0xbb },	\
+	{ 46, 0x60 },	\
+	{ 49, 0x81 },	\
+	{ 50, 0x86 },	\
+	{ 51, 0x75 },	\
+	{ 52, 0x45 },	\
+	{ 53, 0x18 },	\
+	{ 54, 0x18 },	\
+	{ 55, 0x18 },	\
+	{ 56, 0xdb },	\
+	{ 57, 0x6e }
+
+#define RT5390_DEF_RF	\
+	{  1, 0x0f },	\
+	{  2, 0x80 },	\
+	{  3, 0x88 },	\
+	{  5, 0x10 },	\
+	{  6, 0xa0 },	\
+	{  7, 0x00 },	\
+	{ 10, 0x53 },	\
+	{ 11, 0x4a },	\
+	{ 12, 0x46 },	\
+	{ 13, 0x9f },	\
+	{ 14, 0x00 },	\
+	{ 15, 0x00 },	\
+	{ 16, 0x00 },	\
+	{ 18, 0x03 },	\
+	{ 19, 0x00 },	\
+	{ 20, 0x00 },	\
+	{ 21, 0x00 },	\
+	{ 22, 0x20 },  	\
+	{ 23, 0x00 },	\
+	{ 24, 0x00 },	\
+	{ 25, 0xc0 },	\
+	{ 26, 0x00 },	\
+	{ 27, 0x09 },	\
+	{ 28, 0x00 },	\
+	{ 29, 0x10 },	\
+	{ 30, 0x10 },	\
+	{ 31, 0x80 },	\
+	{ 32, 0x80 },	\
+	{ 33, 0x00 },	\
+	{ 34, 0x07 },	\
+	{ 35, 0x12 },	\
+	{ 36, 0x00 },	\
+	{ 37, 0x08 },	\
+	{ 38, 0x85 },	\
+	{ 39, 0x1b },	\
+	{ 40, 0x0b },	\
+	{ 41, 0xbb },	\
+	{ 42, 0xd2 },	\
+	{ 43, 0x9a },	\
+	{ 44, 0x0e },	\
+	{ 45, 0xa2 },	\
+	{ 46, 0x7b },	\
+	{ 47, 0x00 },	\
+	{ 48, 0x10 },	\
+	{ 49, 0x94 },	\
+	{ 52, 0x38 },	\
+	{ 53, 0x84 },	\
+	{ 54, 0x78 },	\
+	{ 55, 0x44 },	\
+	{ 56, 0x22 },	\
+	{ 57, 0x80 },	\
+	{ 58, 0x7f },	\
+	{ 59, 0x8f },	\
+	{ 60, 0x45 },	\
+	{ 61, 0xdd },	\
+	{ 62, 0x00 },	\
+	{ 63, 0x00 }
+
+#define RT5392_DEF_RF	\
+	{  1, 0x17 },	\
+	{  3, 0x88 },	\
+	{  5, 0x10 },	\
+	{  6, 0xe0 },	\
+	{  7, 0x00 },	\
+	{ 10, 0x53 },	\
+	{ 11, 0x4a },	\
+	{ 12, 0x46 },	\
+	{ 13, 0x9f },	\
+	{ 14, 0x00 },	\
+	{ 15, 0x00 },	\
+	{ 16, 0x00 },	\
+	{ 18, 0x03 },	\
+	{ 19, 0x4d },	\
+	{ 20, 0x00 },	\
+	{ 21, 0x8d },	\
+	{ 22, 0x20 },  	\
+	{ 23, 0x0b },	\
+	{ 24, 0x44 },	\
+	{ 25, 0x80 },	\
+	{ 26, 0x82 },	\
+	{ 27, 0x09 },	\
+	{ 28, 0x00 },	\
+	{ 29, 0x10 },	\
+	{ 30, 0x10 },	\
+	{ 31, 0x80 },	\
+	{ 32, 0x20 },	\
+	{ 33, 0xc0 },	\
+	{ 34, 0x07 },	\
+	{ 35, 0x12 },	\
+	{ 36, 0x00 },	\
+	{ 37, 0x08 },	\
+	{ 38, 0x89 },	\
+	{ 39, 0x1b },	\
+	{ 40, 0x0f },	\
+	{ 41, 0xbb },	\
+	{ 42, 0xd5 },	\
+	{ 43, 0x9b },	\
+	{ 44, 0x0e },	\
+	{ 45, 0xa2 },	\
+	{ 46, 0x73 },	\
+	{ 47, 0x0c },	\
+	{ 48, 0x10 },	\
+	{ 49, 0x94 },	\
+	{ 50, 0x94 },	\
+	{ 51, 0x3a },	\
+	{ 52, 0x48 },	\
+	{ 53, 0x44 },	\
+	{ 54, 0x38 },	\
+	{ 55, 0x43 },	\
+	{ 56, 0xa1 },	\
+	{ 57, 0x00 },	\
+	{ 58, 0x39 },	\
+	{ 59, 0x07 },	\
+	{ 60, 0x45 },	\
+	{ 61, 0x91 },	\
+	{ 62, 0x39 },	\
+	{ 63, 0x07 }
+
+#define RT5592_DEF_RF	\
+	{  1, 0x3f },	\
+	{  3, 0x08 },	\
+	{  5, 0x10 },	\
+	{  6, 0xe4 },	\
+	{  7, 0x00 },	\
+	{ 14, 0x00 },	\
+	{ 15, 0x00 },	\
+	{ 16, 0x00 },	\
+	{ 18, 0x03 },	\
+	{ 19, 0x4d },	\
+	{ 20, 0x10 },	\
+	{ 21, 0x8d },	\
+	{ 26, 0x82 },	\
+	{ 28, 0x00 },	\
+	{ 29, 0x10 },	\
+	{ 33, 0xc0 },	\
+	{ 34, 0x07 },	\
+	{ 35, 0x12 },	\
+	{ 47, 0x0c },	\
+	{ 53, 0x22 },	\
+	{ 63, 0x07 }
+
+#define RT5592_2GHZ_DEF_RF	\
+	{ 10, 0x90 },		\
+	{ 11, 0x4a },		\
+	{ 12, 0x52 },		\
+	{ 13, 0x42 },		\
+	{ 22, 0x40 },		\
+	{ 24, 0x4a },		\
+	{ 25, 0x80 },		\
+	{ 27, 0x42 },		\
+	{ 36, 0x80 },		\
+	{ 37, 0x08 },		\
+	{ 38, 0x89 },		\
+	{ 39, 0x1b },		\
+	{ 40, 0x0d },		\
+	{ 41, 0x9b },		\
+	{ 42, 0xd5 },		\
+	{ 43, 0x72 },		\
+	{ 44, 0x0e },		\
+	{ 45, 0xa2 },		\
+	{ 46, 0x6b },		\
+	{ 48, 0x10 },		\
+	{ 51, 0x3e },		\
+	{ 52, 0x48 },		\
+	{ 54, 0x38 },		\
+	{ 56, 0xa1 },		\
+	{ 57, 0x00 },		\
+	{ 58, 0x39 },		\
+	{ 60, 0x45 },		\
+	{ 61, 0x91 },		\
+	{ 62, 0x39 }
+
+#define RT5592_5GHZ_DEF_RF	\
+	{ 10, 0x97 },		\
+	{ 11, 0x40 },		\
+	{ 25, 0xbf },		\
+	{ 27, 0x42 },		\
+	{ 36, 0x00 },		\
+	{ 37, 0x04 },		\
+	{ 38, 0x85 },		\
+	{ 40, 0x42 },		\
+	{ 41, 0xbb },		\
+	{ 42, 0xd7 },		\
+	{ 45, 0x41 },		\
+	{ 48, 0x00 },		\
+	{ 57, 0x77 },		\
+	{ 60, 0x05 },		\
+	{ 61, 0x01 }
+
+#define RT5592_CHAN_5GHZ	\
+	{  36,  64, 12, 0x2e },	\
+	{ 100, 165, 12, 0x0e },	\
+	{  36,  64, 13, 0x22 },	\
+	{ 100, 165, 13, 0x42 },	\
+	{  36,  64, 22, 0x60 },	\
+	{ 100, 165, 22, 0x40 },	\
+	{  36,  64, 23, 0x7f },	\
+	{ 100, 153, 23, 0x3c },	\
+	{ 155, 165, 23, 0x38 },	\
+	{  36,  50, 24, 0x09 },	\
+	{  52,  64, 24, 0x07 },	\
+	{ 100, 153, 24, 0x06 },	\
+	{ 155, 165, 24, 0x05 },	\
+	{  36,  64, 39, 0x1c },	\
+	{ 100, 138, 39, 0x1a },	\
+	{ 140, 165, 39, 0x18 },	\
+	{  36,  64, 43, 0x5b },	\
+	{ 100, 138, 43, 0x3b },	\
+	{ 140, 165, 43, 0x1b },	\
+	{  36,  64, 44, 0x40 },	\
+	{ 100, 138, 44, 0x20 },	\
+	{ 140, 165, 44, 0x10 },	\
+	{  36,  64, 46, 0x00 },	\
+	{ 100, 138, 46, 0x18 },	\
+	{ 140, 165, 46, 0x08 },	\
+	{  36,  64, 51, 0xfe },	\
+	{ 100, 124, 51, 0xfc },	\
+	{ 126, 165, 51, 0xec },	\
+	{  36,  64, 52, 0x0c },	\
+	{ 100, 138, 52, 0x06 },	\
+	{ 140, 165, 52, 0x06 },	\
+	{  36,  64, 54, 0xf8 },	\
+	{ 100, 165, 54, 0xeb },	\
+	{ 36,   50, 55, 0x06 },	\
+	{ 52,   64, 55, 0x04 },	\
+	{ 100, 138, 55, 0x01 },	\
+	{ 140, 165, 55, 0x00 },	\
+	{  36,  50, 56, 0xd3 },	\
+	{  52, 128, 56, 0xbb },	\
+	{ 130, 165, 56, 0xab },	\
+	{  36,  64, 58, 0x15 },	\
+	{ 100, 116, 58, 0x1d },	\
+	{ 118, 165, 58, 0x15 },	\
+	{  36,  64, 59, 0x7f },	\
+	{ 100, 138, 59, 0x3f },	\
+	{ 140, 165, 59, 0x7c },	\
+	{  36,  64, 62, 0x15 },	\
+	{ 100, 116, 62, 0x1d },	\
+	{ 118, 165, 62, 0x15 }
-- 
2.5.2


From e039c0f26561e934d8ff29da4278905133ebd0e7 Mon Sep 17 00:00:00 2001
From: Jeff Rizzo <riz@tastylime.net>
Date: Sat, 19 Dec 2015 14:33:21 -0800
Subject: [PATCH 02/18] Add some RALINK device IDs from OpenBSD.

---
 sys/dev/pci/pcidevs | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/sys/dev/pci/pcidevs b/sys/dev/pci/pcidevs
index f7cae26..72037e3 100644
--- a/sys/dev/pci/pcidevs
+++ b/sys/dev/pci/pcidevs
@@ -5394,7 +5394,21 @@ product	RALINK	RT2560		0x0201	RT2560 802.11b/g
 product	RALINK	RT2561S		0x0301	RT2561S 802.11b/g
 product	RALINK	RT2561		0x0302	RT2561 802.11b/g
 product	RALINK	RT2661		0x0401	RT2661 802.11b/g/n
+product	RALINK	RT2860		0x0601	RT2860
+product	RALINK	RT2890		0x0681	RT2890
+product	RALINK	RT2760		0x0701	RT2760
+product	RALINK	RT2790		0x0781	RT2790
+product	RALINK	RT3060		0x3060	RT3060
+product	RALINK	RT3062		0x3062	RT3062
 product	RALINK	RT3090		0x3090	RT3090 802.11b/g/n
+product	RALINK	RT3091		0x3091	RT3091
+product	RALINK	RT3092		0x3092	RT3092
+product	RALINK	RT3290		0x3290	RT3290
+product	RALINK	RT3298		0x3298	Bluetooth
+product	RALINK	RT3562		0x3562	RT3562
+product	RALINK	RT3592		0x3592	RT3592
+product	RALINK	RT3593		0x3593	RT3593
+product	RALINK	RT5390		0x5390	RT5390
 
 /* RATOC Systems products */
 product RATOC	REXPCI31	0x0853	REX PCI-31/33 SCSI
-- 
2.5.2


From 004c40dd9b9fb05da4f1cbb1212989c946ef3b69 Mon Sep 17 00:00:00 2001
From: Jeff Rizzo <riz@tastylime.net>
Date: Sat, 19 Dec 2015 14:49:23 -0800
Subject: [PATCH 04/18] Add an AWT product with RALink chipset, from OpenBSD

---
 sys/dev/pci/pcidevs | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/sys/dev/pci/pcidevs b/sys/dev/pci/pcidevs
index 72037e3..a42d1ad 100644
--- a/sys/dev/pci/pcidevs
+++ b/sys/dev/pci/pcidevs
@@ -631,6 +631,7 @@ vendor FREESCALE	0x1957	Freescale Semiconductor
 vendor ATTANSIC		0x1969	Attansic Technologies
 vendor JMICRON		0x197b	JMicron Technology
 vendor ASPEED		0x1a03	ASPEED Technology
+vendor AWT		0x1a3b	AWT
 vendor EVE		0x1adb	EVE
 vendor QUMRANET		0x1af4	Qumranet
 vendor ASMEDIA		0x1b21  ASMedia
@@ -1630,6 +1631,9 @@ product AVM FRITZ_PCI_V2_ISDN	0x0e00	Fritz!PCI v2.0 ISDN Interface
 product AVM B1			0x0700	Basic Rate B1 ISDN Interface
 product AVM T1			0x1200	Primary Rate T1 ISDN Interface
 
+/* AWT products */
+product AWT RT2890		0x1059	RT2890
+
 /* RMI products */
 product RMI XLR_PCIX		0x000b	XLR PCI-X bridge
 product RMI XLS_PCIE		0xabcd	XLS PCIe-PCIe bridge
-- 
2.5.2


From bae96087bc9425c2cbc160485a314cc12fe1530d Mon Sep 17 00:00:00 2001
From: Jeff Rizzo <riz@tastylime.net>
Date: Sun, 20 Dec 2015 08:20:48 -0800
Subject: [PATCH 06/18] Update ral(4) microcode to the latest from OpenBSD.

---
 sys/dev/microcode/ral/Makefile    |   2 +-
 sys/dev/microcode/ral/build.c     |   1 +
 sys/dev/microcode/ral/microcode.h | 755 +++++++++++++++++++++++++++++++++++++-
 3 files changed, 753 insertions(+), 5 deletions(-)

diff --git a/sys/dev/microcode/ral/Makefile b/sys/dev/microcode/ral/Makefile
index e44b81df..0ea502c 100644
--- a/sys/dev/microcode/ral/Makefile
+++ b/sys/dev/microcode/ral/Makefile
@@ -2,7 +2,7 @@
 
 NOMAN=	# defined
 
-FILES=	ral-rt2561 ral-rt2561s ral-rt2661 ral-license
+FILES=	ral-rt2561 ral-rt2561s ral-rt2661 ral-rt2860 ral-license
 
 # XXX
 includes:
diff --git a/sys/dev/microcode/ral/build.c b/sys/dev/microcode/ral/build.c
index 045c4a0..ba7c08a 100644
--- a/sys/dev/microcode/ral/build.c
+++ b/sys/dev/microcode/ral/build.c
@@ -54,6 +54,7 @@ main(void)
 	output("ral-rt2561",  rt2561,  sizeof rt2561);
 	output("ral-rt2561s", rt2561s, sizeof rt2561s);
 	output("ral-rt2661",  rt2661,  sizeof rt2661);
+	output("ral-rt2860",  rt2860,  sizeof rt2860);
 
 	return 0;
 }
diff --git a/sys/dev/microcode/ral/microcode.h b/sys/dev/microcode/ral/microcode.h
index be19180..a5e27a3 100644
--- a/sys/dev/microcode/ral/microcode.h
+++ b/sys/dev/microcode/ral/microcode.h
@@ -1,8 +1,7 @@
-/*	$NetBSD: microcode.h,v 1.1 2006/06/04 20:30:17 rpaulo Exp $	*/
-/*	$OpenBSD: microcode.h,v 1.1 2006/01/09 20:03:40 damien Exp $	*/
+/*	$OpenBSD: microcode.h,v 1.7 2010/04/05 14:14:02 damien Exp $	*/
 
 /*-
- * Copyright (c) 2005-2006, Ralink Technology, Corp.
+ * Copyright (c) 2005-2010, Ralink Technology, Corp.
  *	Paul Lin <paul_lin@ralinktech.com.tw>
  *
  * Permission to use, copy, modify, and distribute this software for any
@@ -20,7 +19,7 @@
 
 /*
  * This file contains the loadable 8051 microcodes for the Ralink RT2561,
- * RT2561S and RT2661 chipsets.
+ * RT2561S, RT2661 and RT2860 chipsets.
  */
 
 static const uint8_t rt2561[] = {
@@ -2266,3 +2265,751 @@ static const uint8_t rt2661[] = {
 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 	0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x43, 0xcf
 };
+
+static const uint8_t rt2860[] = {
+	0x02, 0x03, 0x5b, 0x02, 0x02, 0xa6, 0x22, 0x22, 0xff, 0xff, 0xff,
+	0x02, 0x01, 0x2c, 0xff, 0xff, 0xff, 0xff, 0xff, 0x02, 0x00, 0x1e,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0x02, 0x00, 0xdd, 0xc0, 0xe0, 0xc0,
+	0xf0, 0xc0, 0x83, 0xc0, 0x82, 0xc0, 0xd0, 0x75, 0xd0, 0x18, 0xc2,
+	0xaf, 0x30, 0x45, 0x03, 0x12, 0x10, 0x09, 0x90, 0x04, 0x16, 0xe0,
+	0x30, 0xe3, 0x03, 0x74, 0x08, 0xf0, 0x90, 0x04, 0x14, 0xe0, 0x20,
+	0xe7, 0x03, 0x02, 0x00, 0xcb, 0x74, 0x80, 0xf0, 0x90, 0x70, 0x12,
+	0xe0, 0xf5, 0x36, 0x90, 0x04, 0x04, 0xe0, 0x24, 0xcf, 0x60, 0x30,
+	0x14, 0x60, 0x42, 0x24, 0xe2, 0x60, 0x47, 0x14, 0x60, 0x55, 0x24,
+	0x21, 0x70, 0x60, 0xe5, 0x55, 0x24, 0xfe, 0x60, 0x07, 0x14, 0x60,
+	0x08, 0x24, 0x02, 0x70, 0x08, 0x7d, 0x01, 0x80, 0x28, 0x7d, 0x02,
+	0x80, 0x24, 0x90, 0x70, 0x10, 0xe0, 0xf5, 0x50, 0x85, 0x36, 0x40,
+	0xd2, 0x01, 0x80, 0x3e, 0xe5, 0x55, 0x64, 0x03, 0x60, 0x04, 0xe5,
+	0x55, 0x70, 0x04, 0x7d, 0x02, 0x80, 0x09, 0x85, 0x36, 0x41, 0xd2,
+	0x02, 0x80, 0x29, 0xad, 0x55, 0xaf, 0x36, 0x12, 0x02, 0x82, 0x80,
+	0x20, 0x90, 0x70, 0x10, 0xe0, 0xf5, 0x47, 0x90, 0x70, 0x11, 0xe0,
+	0xf5, 0x44, 0x12, 0x10, 0x25, 0x80, 0x06, 0x90, 0x70, 0x10, 0xe0,
+	0xf5, 0x45, 0xe4, 0xfd, 0xaf, 0x36, 0x12, 0x02, 0x82, 0xd2, 0x04,
+	0x90, 0x70, 0x13, 0xe4, 0xf0, 0x90, 0x70, 0x13, 0xe4, 0xf0, 0xd2,
+	0xaf, 0xd0, 0xd0, 0xd0, 0x82, 0xd0, 0x83, 0xd0, 0xf0, 0xd0, 0xe0,
+	0x32, 0xc0, 0xe0, 0xc0, 0xf0, 0xc0, 0x83, 0xc0, 0x82, 0xc0, 0xd0,
+	0xe8, 0xc0, 0xe0, 0xe9, 0xc0, 0xe0, 0xea, 0xc0, 0xe0, 0xeb, 0xc0,
+	0xe0, 0xec, 0xc0, 0xe0, 0xed, 0xc0, 0xe0, 0xee, 0xc0, 0xe0, 0xef,
+	0xc0, 0xe0, 0xc2, 0xaf, 0x30, 0x45, 0x03, 0x12, 0x10, 0x12, 0xd2,
+	0xaf, 0xd0, 0xe0, 0xff, 0xd0, 0xe0, 0xfe, 0xd0, 0xe0, 0xfd, 0xd0,
+	0xe0, 0xfc, 0xd0, 0xe0, 0xfb, 0xd0, 0xe0, 0xfa, 0xd0, 0xe0, 0xf9,
+	0xd0, 0xe0, 0xf8, 0xd0, 0xd0, 0xd0, 0x82, 0xd0, 0x83, 0xd0, 0xf0,
+	0xd0, 0xe0, 0x32, 0xc0, 0xe0, 0xc0, 0xf0, 0xc0, 0x83, 0xc0, 0x82,
+	0xc0, 0xd0, 0x75, 0xd0, 0x10, 0xc2, 0xaf, 0x30, 0x45, 0x03, 0x12,
+	0x10, 0x0c, 0x30, 0x58, 0x0a, 0xe5, 0x54, 0x60, 0x04, 0x15, 0x54,
+	0x80, 0x02, 0xc2, 0x58, 0x30, 0x59, 0x0a, 0xe5, 0x50, 0x60, 0x04,
+	0x15, 0x50, 0x80, 0x02, 0xc2, 0x59, 0xd5, 0x53, 0x07, 0x30, 0x60,
+	0x04, 0x15, 0x46, 0xd2, 0x04, 0x30, 0x45, 0x03, 0x12, 0x10, 0x0f,
+	0xc2, 0x8d, 0xd2, 0xaf, 0xd0, 0xd0, 0xd0, 0x82, 0xd0, 0x83, 0xd0,
+	0xf0, 0xd0, 0xe0, 0x32, 0x90, 0x70, 0x2a, 0xe0, 0x30, 0xe1, 0x43,
+	0xc2, 0xaf, 0x90, 0x70, 0x28, 0xe0, 0x90, 0x10, 0x1c, 0xf0, 0x90,
+	0x70, 0x29, 0xe0, 0x90, 0x10, 0x1d, 0xf0, 0x90, 0x70, 0x2a, 0xe0,
+	0x90, 0x10, 0x1e, 0xf0, 0x90, 0x10, 0x1c, 0xe0, 0xf5, 0x37, 0x90,
+	0x10, 0x1e, 0xe0, 0x20, 0xe1, 0xf3, 0x90, 0x10, 0x1c, 0xe0, 0x90,
+	0x70, 0x28, 0xf0, 0x90, 0x10, 0x1d, 0xe0, 0x90, 0x70, 0x29, 0xf0,
+	0x90, 0x10, 0x1e, 0xe0, 0x90, 0x70, 0x2a, 0xf0, 0xc2, 0x05, 0xd2,
+	0xaf, 0x22, 0x12, 0x02, 0xc8, 0x30, 0x45, 0x03, 0x12, 0x10, 0x03,
+	0x30, 0x01, 0x06, 0x20, 0x09, 0x03, 0x12, 0x10, 0x1c, 0x30, 0x02,
+	0x06, 0x20, 0x0a, 0x03, 0x12, 0x10, 0x1f, 0x30, 0x03, 0x06, 0x20,
+	0x0b, 0x03, 0x12, 0x10, 0x1f, 0x30, 0x04, 0x06, 0x20, 0x0c, 0x03,
+	0x12, 0x10, 0x22, 0x20, 0x13, 0x09, 0x20, 0x11, 0x06, 0xe5, 0x2b,
+	0x45, 0x2c, 0x60, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x92, 0xa9, 0x12,
+	0x03, 0x1c, 0x80, 0xbf, 0xc2, 0x43, 0xd2, 0x45, 0xe4, 0xf5, 0x20,
+	0xf5, 0x21, 0xf5, 0x53, 0xf5, 0x46, 0xf5, 0x2b, 0xf5, 0x2c, 0xc2,
+	0x42, 0xf5, 0x51, 0xf5, 0x52, 0xf5, 0x55, 0x90, 0x04, 0x18, 0x74,
+	0x80, 0xf0, 0x90, 0x04, 0x1a, 0x74, 0x08, 0xf0, 0xc2, 0x1a, 0xc2,
+	0x18, 0xc2, 0x1b, 0x22, 0xc8, 0xef, 0xc8, 0xe6, 0xfa, 0x08, 0xe6,
+	0x4a, 0x60, 0x0c, 0xc8, 0xef, 0xc8, 0x08, 0xe6, 0x16, 0x18, 0x70,
+	0x01, 0x16, 0xc3, 0x22, 0xed, 0x24, 0xff, 0xfd, 0xec, 0x34, 0xff,
+	0xc8, 0xef, 0xc8, 0xf6, 0x08, 0xc6, 0xed, 0xc6, 0xd3, 0x22, 0xd0,
+	0x83, 0xd0, 0x82, 0xf8, 0xe4, 0x93, 0x70, 0x12, 0x74, 0x01, 0x93,
+	0x70, 0x0d, 0xa3, 0xa3, 0x93, 0xf8, 0x74, 0x01, 0x93, 0xf5, 0x82,
+	0x88, 0x83, 0xe4, 0x73, 0x74, 0x02, 0x93, 0x68, 0x60, 0xef, 0xa3,
+	0xa3, 0xa3, 0x80, 0xdf, 0xef, 0xf4, 0x60, 0x1f, 0xe4, 0xfe, 0x12,
+	0x03, 0x67, 0xe0, 0xb4, 0xff, 0x12, 0x12, 0x03, 0x67, 0xef, 0xf0,
+	0x74, 0x1c, 0x2e, 0xf5, 0x82, 0xe4, 0x34, 0x70, 0xf5, 0x83, 0xed,
+	0xf0, 0x22, 0x0e, 0xbe, 0x04, 0xe3, 0x22, 0xc0, 0xe0, 0xc0, 0xf0,
+	0xc0, 0x83, 0xc0, 0x82, 0xc0, 0xd0, 0x75, 0xd0, 0x08, 0xc2, 0xaf,
+	0x30, 0x45, 0x03, 0x12, 0x10, 0x06, 0xd2, 0xaf, 0xd0, 0xd0, 0xd0,
+	0x82, 0xd0, 0x83, 0xd0, 0xf0, 0xd0, 0xe0, 0x32, 0xc2, 0xaf, 0x12,
+	0x00, 0x06, 0x12, 0x02, 0x09, 0x12, 0x02, 0xe1, 0xe4, 0xf5, 0x22,
+	0xf5, 0x47, 0x90, 0x04, 0x00, 0x74, 0x80, 0xf0, 0xd2, 0xaf, 0x22,
+	0x75, 0x89, 0x02, 0xe4, 0xf5, 0x8c, 0xf5, 0x8a, 0xf5, 0x88, 0xf5,
+	0xb8, 0xf5, 0xe8, 0x75, 0x90, 0x18, 0xd2, 0x8c, 0x75, 0xa8, 0x05,
+	0x22, 0xef, 0x60, 0x03, 0x1f, 0x80, 0xfa, 0x22, 0xff, 0xc0, 0x26,
+	0x74, 0x03, 0xc0, 0xe0, 0xc0, 0x82, 0xc0, 0x83, 0x75, 0x26, 0x0a,
+	0x22, 0xc0, 0x26, 0x74, 0x03, 0xc0, 0xe0, 0xc0, 0x82, 0xc0, 0x83,
+	0x75, 0x26, 0x18, 0x22, 0x30, 0x45, 0x03, 0x12, 0x10, 0x15, 0xe5,
+	0x20, 0x70, 0x03, 0x20, 0x10, 0x03, 0x30, 0x11, 0x03, 0x43, 0x87,
+	0x01, 0x22, 0xce, 0xef, 0xce, 0xee, 0x60, 0x08, 0x7f, 0xff, 0x12,
+	0x02, 0xf8, 0x1e, 0x80, 0xf5, 0x22, 0xc8, 0xef, 0xc8, 0xe6, 0x60,
+	0x03, 0x16, 0xc3, 0x22, 0xed, 0x14, 0xf6, 0xd3, 0x22, 0xc8, 0xef,
+	0xc8, 0xe6, 0x60, 0x06, 0x16, 0xe6, 0x24, 0xff, 0xb3, 0x22, 0xc3,
+	0x22, 0x78, 0x7f, 0xe4, 0xf6, 0xd8, 0xfd, 0x75, 0x81, 0x5f, 0x02,
+	0x01, 0xc5, 0x74, 0x14, 0x2e, 0xf5, 0x82, 0xe4, 0x34, 0x70, 0xf5,
+	0x83, 0x22, 0xef, 0x90, 0x03, 0x7b, 0x93, 0x90, 0x03, 0x00, 0x73,
+	0x0a, 0x18, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x02, 0x10, 0x28, 0x02,
+	0x10, 0x3b, 0x02, 0x10, 0x3c, 0x02, 0x13, 0xbc, 0x02, 0x13, 0xbd,
+	0x02, 0x14, 0x72, 0x02, 0x14, 0x73, 0xc3, 0x22, 0xff, 0xff, 0x02,
+	0x19, 0x4a, 0x02, 0x1a, 0xf4, 0x02, 0x15, 0x6c, 0x02, 0x14, 0xa7,
+	0x30, 0x05, 0x06, 0x20, 0x0d, 0x03, 0x12, 0x01, 0x7a, 0x30, 0x06,
+	0x06, 0x20, 0x0e, 0x03, 0x12, 0x1c, 0x2e, 0x22, 0x22, 0x90, 0x04,
+	0x14, 0xe0, 0x20, 0xe7, 0x03, 0x02, 0x13, 0xbb, 0x90, 0x70, 0x12,
+	0xe0, 0xf5, 0x56, 0x90, 0x04, 0x04, 0xe0, 0x12, 0x02, 0x5c, 0x10,
+	0xfb, 0x30, 0x10, 0xd2, 0x31, 0x10, 0x93, 0x33, 0x10, 0xa1, 0x34,
+	0x10, 0xb4, 0x35, 0x10, 0xab, 0x36, 0x11, 0x09, 0x50, 0x11, 0x4e,
+	0x51, 0x11, 0x57, 0x52, 0x11, 0x57, 0x53, 0x11, 0x57, 0x54, 0x11,
+	0x93, 0x55, 0x11, 0xf0, 0x56, 0x12, 0x43, 0x70, 0x12, 0x69, 0x71,
+	0x12, 0x92, 0x72, 0x13, 0x3e, 0x73, 0x13, 0x61, 0x80, 0x13, 0x88,
+	0x83, 0x13, 0xa0, 0x84, 0x00, 0x00, 0x13, 0xbb, 0xd2, 0x18, 0xd2,
+	0x61, 0x75, 0x35, 0x2a, 0x75, 0x32, 0x0b, 0x75, 0x33, 0xb8, 0x22,
+	0xc2, 0x18, 0x90, 0x01, 0x14, 0xe0, 0x54, 0xfd, 0xf0, 0x22, 0x90,
+	0x70, 0x11, 0xe0, 0xf5, 0x3c, 0x02, 0x13, 0xb5, 0xe5, 0x55, 0xb4,
+	0x02, 0x0f, 0xe5, 0x58, 0x30, 0xe0, 0x06, 0x90, 0x01, 0x0d, 0x74,
+	0x08, 0xf0, 0x7d, 0x01, 0x80, 0x02, 0x7d, 0x02, 0xaf, 0x56, 0x12,
+	0x02, 0x82, 0x02, 0x13, 0xb5, 0x20, 0x02, 0x03, 0x30, 0x03, 0x0a,
+	0x7d, 0x02, 0xaf, 0x56, 0x12, 0x02, 0x82, 0x02, 0x13, 0xb5, 0xe5,
+	0x34, 0xd3, 0x94, 0x01, 0x40, 0x0c, 0x90, 0x01, 0x0c, 0xe0, 0x44,
+	0x02, 0xf0, 0xa3, 0xe0, 0x44, 0x04, 0xf0, 0x85, 0x56, 0x41, 0xd2,
+	0x02, 0x22, 0x90, 0x70, 0x11, 0xe0, 0xf4, 0x70, 0x03, 0x02, 0x13,
+	0xbb, 0xe0, 0xf5, 0x30, 0x22, 0xe5, 0x34, 0xd3, 0x94, 0x01, 0x40,
+	0x07, 0xe5, 0x55, 0x60, 0x03, 0x02, 0x13, 0xbb, 0x90, 0x70, 0x10,
+	0xe0, 0x54, 0x7f, 0xff, 0xbf, 0x0a, 0x0d, 0x90, 0x70, 0x11, 0xe0,
+	0xb4, 0x08, 0x06, 0x75, 0x4e, 0x01, 0x75, 0x4f, 0x84, 0x90, 0x70,
+	0x10, 0xe0, 0x54, 0x7f, 0xff, 0xbf, 0x02, 0x12, 0x90, 0x70, 0x11,
+	0xe0, 0x64, 0x08, 0x60, 0x04, 0xe0, 0xb4, 0x20, 0x06, 0x75, 0x4e,
+	0x03, 0x75, 0x4f, 0x20, 0xe4, 0xf5, 0x27, 0x22, 0x90, 0x70, 0x11,
+	0xe0, 0x24, 0xff, 0x92, 0x47, 0x22, 0xe5, 0x34, 0xd3, 0x94, 0x01,
+	0x40, 0x07, 0xe5, 0x55, 0x60, 0x03, 0x02, 0x13, 0x49, 0x90, 0x04,
+	0x04, 0xe0, 0x25, 0xe0, 0x24, 0x5d, 0xf5, 0x57, 0x90, 0x70, 0x10,
+	0xe0, 0xff, 0x74, 0x47, 0x25, 0x57, 0xf8, 0xc6, 0xef, 0xc6, 0x90,
+	0x70, 0x11, 0xe0, 0xff, 0x74, 0x48, 0x25, 0x57, 0xf8, 0xc6, 0xef,
+	0xc6, 0xe4, 0xfd, 0xaf, 0x56, 0x12, 0x02, 0x82, 0x02, 0x13, 0xb5,
+	0xe5, 0x34, 0xd3, 0x94, 0x01, 0x40, 0x07, 0xe5, 0x55, 0x60, 0x03,
+	0x02, 0x13, 0x49, 0xe5, 0x47, 0x64, 0x07, 0x60, 0x1d, 0xe5, 0x47,
+	0x64, 0x08, 0x60, 0x17, 0xe5, 0x47, 0x64, 0x09, 0x60, 0x11, 0xe5,
+	0x47, 0x64, 0x0a, 0x60, 0x0b, 0xe5, 0x47, 0x64, 0x0b, 0x60, 0x05,
+	0xe5, 0x47, 0xb4, 0x0c, 0x08, 0x90, 0x70, 0x11, 0xe0, 0x54, 0x0f,
+	0xf5, 0x3a, 0xe5, 0x47, 0xb4, 0x09, 0x08, 0xe5, 0x3a, 0xb4, 0x03,
+	0x03, 0xe4, 0xf5, 0x46, 0xe5, 0x47, 0xb4, 0x0a, 0x08, 0xe5, 0x3a,
+	0xb4, 0x01, 0x03, 0xe4, 0xf5, 0x46, 0xe4, 0xfd, 0xaf, 0x56, 0x12,
+	0x02, 0x82, 0xd2, 0x04, 0x22, 0x90, 0x70, 0x11, 0xe0, 0xf4, 0xff,
+	0x90, 0x70, 0x10, 0xe0, 0x5f, 0xff, 0x90, 0x70, 0x11, 0xe0, 0x55,
+	0x27, 0x4f, 0x90, 0x70, 0x18, 0xf0, 0x90, 0x70, 0x11, 0xe0, 0x90,
+	0x70, 0x19, 0xf0, 0xe4, 0xfd, 0xaf, 0x56, 0x12, 0x02, 0x82, 0x30,
+	0x15, 0x03, 0xd2, 0x14, 0x22, 0x90, 0x70, 0x18, 0xe0, 0xf5, 0x27,
+	0x90, 0x02, 0x29, 0xe0, 0xff, 0x90, 0x70, 0x19, 0xe0, 0xfe, 0xef,
+	0x5e, 0x90, 0x02, 0x29, 0xf0, 0x30, 0x47, 0x04, 0xaf, 0x27, 0x80,
+	0x04, 0xe5, 0x27, 0xf4, 0xff, 0x90, 0x02, 0x28, 0xef, 0xf0, 0x22,
+	0xe5, 0x34, 0xd3, 0x94, 0x01, 0x40, 0x07, 0xe5, 0x55, 0x60, 0x03,
+	0x02, 0x13, 0x49, 0x90, 0x70, 0x10, 0xe0, 0xfe, 0x90, 0x70, 0x11,
+	0xe0, 0xfd, 0xed, 0xf8, 0xe6, 0xf5, 0x57, 0xfd, 0xaf, 0x56, 0x12,
+	0x02, 0x82, 0x02, 0x13, 0xb5, 0xe5, 0x34, 0xd3, 0x94, 0x01, 0x40,
+	0x07, 0xe5, 0x55, 0x60, 0x03, 0x02, 0x13, 0x49, 0x90, 0x70, 0x10,
+	0xe0, 0xfe, 0x90, 0x70, 0x11, 0xe0, 0xfd, 0xed, 0xf5, 0x82, 0x8e,
+	0x83, 0xe0, 0xf5, 0x57, 0xfd, 0xaf, 0x56, 0x12, 0x02, 0x82, 0x02,
+	0x13, 0xb5, 0x90, 0x10, 0x00, 0xe0, 0xf5, 0x57, 0xe4, 0xf5, 0x58,
+	0xf5, 0x59, 0x90, 0x10, 0x03, 0xe0, 0xb4, 0x28, 0x05, 0x75, 0x58,
+	0x01, 0x80, 0x3c, 0x90, 0x10, 0x03, 0xe0, 0xb4, 0x30, 0x05, 0x75,
+	0x58, 0x02, 0x80, 0x30, 0x90, 0x10, 0x03, 0xe0, 0xb4, 0x33, 0x05,
+	0x75, 0x58, 0x04, 0x80, 0x24, 0x90, 0x10, 0x03, 0xe0, 0xb4, 0x35,
+	0x0c, 0x90, 0x10, 0x02, 0xe0, 0xb4, 0x72, 0x05, 0x75, 0x58, 0x08,
+	0x80, 0x11, 0x90, 0x10, 0x03, 0xe0, 0xb4, 0x35, 0x0a, 0x90, 0x10,
+	0x02, 0xe0, 0xb4, 0x93, 0x03, 0x75, 0x58, 0x10, 0xe5, 0x58, 0x30,
+	0xe1, 0x19, 0x90, 0x05, 0x08, 0xe0, 0x44, 0x01, 0xf0, 0xfd, 0x90,
+	0x05, 0x05, 0xe0, 0x54, 0xfb, 0xf0, 0x44, 0x04, 0xf0, 0xed, 0x54,
+	0xfe, 0x90, 0x05, 0x08, 0xf0, 0xe4, 0xf5, 0x4e, 0xf5, 0x4f, 0x75,
+	0x3a, 0xff, 0xc2, 0x1a, 0xc2, 0x18, 0xc2, 0x1b, 0xf5, 0x34, 0x90,
+	0x05, 0xa4, 0x74, 0x11, 0xf0, 0xa3, 0x74, 0xff, 0xf0, 0xa3, 0x74,
+	0x03, 0xf0, 0xe4, 0xf5, 0x30, 0xc2, 0x19, 0x90, 0x01, 0x0d, 0xe0,
+	0x44, 0x40, 0xf0, 0x75, 0x3c, 0xff, 0xad, 0x57, 0xaf, 0x56, 0x12,
+	0x02, 0x82, 0xe4, 0x90, 0x70, 0x32, 0xf0, 0x80, 0x77, 0xe5, 0x34,
+	0xd3, 0x94, 0x01, 0x40, 0x0b, 0xe5, 0x55, 0x60, 0x07, 0x7d, 0x03,
+	0xaf, 0x56, 0x02, 0x02, 0x82, 0x90, 0x70, 0x10, 0xe0, 0x24, 0xff,
+	0x92, 0x93, 0xe4, 0xfd, 0xaf, 0x56, 0x12, 0x02, 0x82, 0x80, 0x54,
+	0xe5, 0x34, 0xd3, 0x94, 0x01, 0x40, 0x0d, 0xe5, 0x55, 0x60, 0x09,
+	0x7d, 0x03, 0xaf, 0x56, 0x12, 0x02, 0x82, 0x80, 0x40, 0x90, 0x70,
+	0x10, 0xe0, 0x24, 0xff, 0x92, 0x4a, 0xd2, 0x05, 0xad, 0x57, 0xaf,
+	0x56, 0x12, 0x02, 0x82, 0x80, 0x2d, 0xe4, 0xf5, 0x34, 0xf5, 0x30,
+	0x90, 0x70, 0x10, 0xe0, 0xf4, 0x60, 0x03, 0xe0, 0xf5, 0x34, 0xad,
+	0x57, 0xaf, 0x56, 0x12, 0x02, 0x82, 0x80, 0x15, 0xd2, 0x19, 0x05,
+	0x2f, 0xe5, 0x2f, 0xb4, 0x1a, 0x03, 0xe4, 0xf5, 0x2f, 0xd2, 0x04,
+	0xad, 0x57, 0xaf, 0x56, 0x12, 0x02, 0x82, 0x90, 0x04, 0x14, 0x74,
+	0x80, 0xf0, 0x22, 0x22, 0xe5, 0x34, 0xc3, 0x94, 0x03, 0x40, 0x17,
+	0xe5, 0x55, 0xb4, 0x02, 0x12, 0xe5, 0x30, 0x60, 0x0e, 0x30, 0x60,
+	0x0b, 0x74, 0xfd, 0x25, 0x46, 0xf5, 0x46, 0xd2, 0x04, 0xe4, 0xf5,
+	0x53, 0xe5, 0x53, 0x60, 0x03, 0x02, 0x14, 0x71, 0x30, 0x60, 0x21,
+	0xb2, 0x4d, 0x30, 0x4d, 0x1c, 0xe5, 0x34, 0xc3, 0x94, 0x03, 0x40,
+	0x11, 0xe5, 0x55, 0xb4, 0x02, 0x0c, 0xe5, 0x30, 0x60, 0x08, 0x74,
+	0x03, 0x25, 0x46, 0xf5, 0x46, 0x80, 0x02, 0x05, 0x46, 0xc2, 0x04,
+	0xe5, 0x4f, 0x45, 0x4e, 0x60, 0x08, 0xe5, 0x4f, 0x15, 0x4f, 0x70,
+	0x02, 0x15, 0x4e, 0x30, 0x1a, 0x49, 0x7f, 0x32, 0x7d, 0xb8, 0x7c,
+	0x0b, 0x12, 0x02, 0x35, 0x50, 0x06, 0x90, 0x04, 0x10, 0x74, 0x40,
+	0xf0, 0x7f, 0x35, 0x7d, 0x32, 0x12, 0x03, 0x3f, 0x50, 0x09, 0x90,
+	0x10, 0x04, 0xe0, 0x54, 0xf7, 0xf0, 0xd2, 0x06, 0xe5, 0x35, 0xd3,
+	0x94, 0x2d, 0x40, 0x30, 0x30, 0x1b, 0x2d, 0xc2, 0x1b, 0xa2, 0x18,
+	0x92, 0x1a, 0x20, 0x1a, 0x24, 0x90, 0x04, 0x09, 0xe0, 0x54, 0xdd,
+	0xf0, 0x90, 0x10, 0x04, 0xe0, 0x44, 0x08, 0xf0, 0xc2, 0x61, 0xd2,
+	0x03, 0x22, 0xe4, 0xf5, 0x35, 0xa2, 0x18, 0x92, 0x1a, 0x30, 0x1a,
+	0x07, 0x90, 0x04, 0x09, 0xe0, 0x44, 0x22, 0xf0, 0x22, 0x22, 0x30,
+	0x14, 0x30, 0x90, 0x70, 0x19, 0xe0, 0x55, 0x27, 0xff, 0x90, 0x70,
+	0x18, 0xe0, 0x4f, 0xf5, 0x27, 0x90, 0x02, 0x29, 0xe0, 0xff, 0x90,
+	0x70, 0x19, 0xe0, 0xfe, 0xef, 0x5e, 0x90, 0x02, 0x29, 0xf0, 0x30,
+	0x47, 0x04, 0xaf, 0x27, 0x80, 0x04, 0xe5, 0x27, 0xf4, 0xff, 0x90,
+	0x02, 0x28, 0xef, 0xf0, 0xc2, 0x14, 0x22, 0xc2, 0x4b, 0xc2, 0x4c,
+	0xe5, 0x44, 0x12, 0x02, 0x5c, 0x14, 0xc9, 0x00, 0x15, 0x57, 0x04,
+	0x15, 0x53, 0x08, 0x15, 0x33, 0x10, 0x14, 0xdd, 0x20, 0x14, 0xfd,
+	0x60, 0x15, 0x0e, 0xa0, 0x00, 0x00, 0x15, 0x59, 0x85, 0x48, 0x43,
+	0x85, 0x4a, 0x42, 0x85, 0x4c, 0x5e, 0xe5, 0x47, 0x64, 0x06, 0x60,
+	0x03, 0x02, 0x15, 0x59, 0x80, 0x1b, 0xe5, 0x48, 0xc4, 0x54, 0x0f,
+	0xf5, 0x43, 0xe5, 0x4a, 0xc4, 0x54, 0x0f, 0xf5, 0x42, 0xe5, 0x4c,
+	0xc4, 0x54, 0x0f, 0xf5, 0x5e, 0xe5, 0x47, 0x64, 0x06, 0x70, 0x61,
+	0x53, 0x43, 0x0f, 0x80, 0x5c, 0x85, 0x49, 0x43, 0x85, 0x4b, 0x42,
+	0x85, 0x4d, 0x5e, 0xe5, 0x47, 0x64, 0x06, 0x70, 0x4d, 0x80, 0x1b,
+	0xe5, 0x49, 0xc4, 0x54, 0x0f, 0xf5, 0x43, 0xe5, 0x4b, 0xc4, 0x54,
+	0x0f, 0xf5, 0x42, 0xe5, 0x4d, 0xc4, 0x54, 0x0f, 0xf5, 0x5e, 0xe5,
+	0x47, 0x64, 0x06, 0x70, 0x30, 0xe5, 0x43, 0x54, 0x0f, 0x44, 0x10,
+	0xf5, 0x43, 0x80, 0x26, 0xe5, 0x47, 0x64, 0x04, 0x60, 0x05, 0xe5,
+	0x47, 0xb4, 0x05, 0x06, 0x43, 0x5e, 0x04, 0x75, 0x42, 0x09, 0xe5,
+	0x47, 0xb4, 0x06, 0x10, 0xe5, 0x43, 0x54, 0x0f, 0x44, 0x30, 0xf5,
+	0x43, 0x80, 0x06, 0xd2, 0x4b, 0x80, 0x02, 0xd2, 0x4c, 0xe4, 0xf5,
+	0x2a, 0xe5, 0x42, 0xc4, 0x54, 0xf0, 0xff, 0xe5, 0x43, 0x54, 0x0f,
+	0x4f, 0xf5, 0x5f, 0xd2, 0x60, 0x22, 0xd2, 0x15, 0xe5, 0x47, 0x24,
+	0xf5, 0x60, 0x0b, 0x24, 0xcb, 0x60, 0x07, 0x24, 0x40, 0x70, 0x06,
+	0xc2, 0x15, 0x22, 0x12, 0x19, 0x15, 0x12, 0x15, 0x8e, 0xc2, 0x15,
+	0xc2, 0xaf, 0xc2, 0x04, 0xd2, 0xaf, 0x22, 0xc2, 0xaf, 0x90, 0x04,
+	0x14, 0xe0, 0x54, 0x0e, 0x60, 0x04, 0xd2, 0x1c, 0x80, 0x08, 0xe5,
+	0x4e, 0x45, 0x4f, 0x24, 0xff, 0x92, 0x1c, 0xd2, 0xaf, 0x90, 0x04,
+	0x14, 0xe0, 0xa2, 0xe4, 0x92, 0x1d, 0x74, 0x1e, 0xf0, 0xe5, 0x5f,
+	0x54, 0x0f, 0xf5, 0x2d, 0xe5, 0x2a, 0x70, 0x13, 0x30, 0x1c, 0x05,
+	0xe5, 0x5f, 0x20, 0xe5, 0x0b, 0x30, 0x1d, 0x29, 0xe5, 0x5f, 0x54,
+	0x30, 0x64, 0x30, 0x70, 0x21, 0xe5, 0x2a, 0x70, 0x15, 0xe5, 0x34,
+	0xc3, 0x94, 0x03, 0x40, 0x09, 0xe5, 0x30, 0x60, 0x05, 0x75, 0x2a,
+	0x05, 0x80, 0x07, 0x75, 0x2a, 0x0c, 0x80, 0x02, 0x15, 0x2a, 0xd2,
+	0x6c, 0xd2, 0x6d, 0x80, 0x0f, 0xe5, 0x5f, 0x30, 0xe6, 0x06, 0xc2,
+	0x6c, 0xd2, 0x6d, 0x80, 0x04, 0xd2, 0x6c, 0xc2, 0x6d, 0xe5, 0x47,
+	0x64, 0x03, 0x70, 0x21, 0x30, 0x4b, 0x06, 0xc2, 0x6c, 0xd2, 0x6d,
+	0x80, 0x18, 0xe5, 0x2a, 0x70, 0x03, 0x30, 0x4c, 0x11, 0xc2, 0x4c,
+	0xe5, 0x2a, 0x70, 0x05, 0x75, 0x2a, 0x07, 0x80, 0x02, 0x15, 0x2a,
+	0xd2, 0x6c, 0xd2, 0x6d, 0xe5, 0x47, 0xb4, 0x09, 0x14, 0xe5, 0x44,
+	0x20, 0xe3, 0x0b, 0xe5, 0x3a, 0x64, 0x02, 0x60, 0x05, 0xe5, 0x3a,
+	0xb4, 0x03, 0x04, 0xc2, 0x6c, 0xd2, 0x6d, 0xe5, 0x47, 0xb4, 0x0a,
+	0x13, 0xe5, 0x3a, 0xb4, 0x01, 0x06, 0xc2, 0x6c, 0xd2, 0x6d, 0x80,
+	0x08, 0xe5, 0x3a, 0x70, 0x04, 0xd2, 0x6c, 0xc2, 0x6d, 0x20, 0x69,
+	0x07, 0xe5, 0x5e, 0x20, 0xe0, 0x02, 0xb2, 0x68, 0x20, 0x6b, 0x07,
+	0xe5, 0x5e, 0x20, 0xe1, 0x02, 0xb2, 0x6a, 0x20, 0x6d, 0x07, 0xe5,
+	0x5e, 0x20, 0xe2, 0x02, 0xb2, 0x6c, 0x75, 0x2e, 0x40, 0x20, 0x69,
+	0x04, 0xa2, 0x68, 0x80, 0x45, 0x30, 0x68, 0x06, 0xe5, 0x46, 0xa2,
+	0xe2, 0x80, 0x3c, 0x30, 0x19, 0x1c, 0xe5, 0x5e, 0x20, 0xe0, 0x04,
+	0x7f, 0x01, 0x80, 0x02, 0x7f, 0x00, 0xe5, 0x2f, 0xb4, 0x19, 0x04,
+	0x7e, 0x01, 0x80, 0x02, 0x7e, 0x00, 0xee, 0x6f, 0x24, 0xff, 0x80,
+	0x1d, 0xe5, 0x5e, 0x20, 0xe0, 0x04, 0x7f, 0x01, 0x80, 0x02, 0x7f,
+	0x00, 0xe5, 0x46, 0x54, 0xf0, 0xfe, 0xbe, 0xf0, 0x04, 0x7e, 0x01,
+	0x80, 0x02, 0x7e, 0x00, 0xee, 0x6f, 0x24, 0xff, 0x92, 0x73, 0x92,
+	0x72, 0x20, 0x6b, 0x04, 0xa2, 0x6a, 0x80, 0x45, 0x30, 0x6a, 0x06,
+	0xe5, 0x46, 0xa2, 0xe2, 0x80, 0x3c, 0x30, 0x19, 0x1c, 0xe5, 0x5e,
+	0x20, 0xe1, 0x04, 0x7f, 0x01, 0x80, 0x02, 0x7f, 0x00, 0xe5, 0x2f,
+	0xb4, 0x19, 0x04, 0x7e, 0x01, 0x80, 0x02, 0x7e, 0x00, 0xee, 0x6f,
+	0x24, 0xff, 0x80, 0x1d, 0xe5, 0x5e, 0x20, 0xe1, 0x04, 0x7f, 0x01,
+	0x80, 0x02, 0x7f, 0x00, 0xe5, 0x46, 0x54, 0xf0, 0xfe, 0xbe, 0xf0,
+	0x04, 0x7e, 0x01, 0x80, 0x02, 0x7e, 0x00, 0xee, 0x6f, 0x24, 0xff,
+	0x92, 0x75, 0x92, 0x74, 0x20, 0x6d, 0x04, 0xa2, 0x6c, 0x80, 0x26,
+	0xe5, 0x47, 0x64, 0x0a, 0x70, 0x22, 0x30, 0x6c, 0x06, 0xe5, 0x46,
+	0xa2, 0xe3, 0x80, 0x17, 0xe5, 0x3a, 0xb4, 0x01, 0x06, 0xe5, 0x46,
+	0xa2, 0xe3, 0x80, 0x53, 0xe5, 0x46, 0x20, 0xe4, 0x03, 0x30, 0xe5,
+	0x03, 0xd3, 0x80, 0x01, 0xc3, 0x80, 0x45, 0x30, 0x6c, 0x06, 0xe5,
+	0x46, 0xa2, 0xe2, 0x80, 0x3c, 0x30, 0x19, 0x1c, 0xe5, 0x5e, 0x20,
+	0xe2, 0x04, 0x7f, 0x01, 0x80, 0x02, 0x7f, 0x00, 0xe5, 0x2f, 0xb4,
+	0x19, 0x04, 0x7e, 0x01, 0x80, 0x02, 0x7e, 0x00, 0xee, 0x6f, 0x24,
+	0xff, 0x80, 0x1d, 0xe5, 0x5e, 0x20, 0xe2, 0x04, 0x7f, 0x01, 0x80,
+	0x02, 0x7f, 0x00, 0xe5, 0x46, 0x54, 0xf0, 0xfe, 0xbe, 0xf0, 0x04,
+	0x7e, 0x01, 0x80, 0x02, 0x7e, 0x00, 0xee, 0x6f, 0x24, 0xff, 0x92,
+	0x71, 0x92, 0x70, 0x90, 0x10, 0x00, 0xe0, 0x90, 0x10, 0x2c, 0xf0,
+	0x90, 0x10, 0x03, 0xe0, 0xc3, 0x94, 0x30, 0x40, 0x14, 0xa2, 0x71,
+	0x92, 0x77, 0xa2, 0x70, 0x92, 0x76, 0xe5, 0x2e, 0x13, 0x13, 0x54,
+	0x3f, 0xf5, 0x2e, 0xc2, 0x77, 0xd2, 0x76, 0x90, 0x10, 0x2f, 0xe5,
+	0x2e, 0xf0, 0xe5, 0x47, 0x64, 0x06, 0x70, 0x39, 0x90, 0x02, 0x29,
+	0xe0, 0x54, 0xfe, 0xf0, 0xe5, 0x43, 0xc4, 0x54, 0x0f, 0x14, 0x60,
+	0x0c, 0x24, 0xfe, 0x60, 0x0c, 0x24, 0x03, 0x70, 0x13, 0xc2, 0x38,
+	0x80, 0x0f, 0xd2, 0x38, 0x80, 0x0b, 0xe5, 0x46, 0x30, 0xe2, 0x03,
+	0xd3, 0x80, 0x01, 0xc3, 0x92, 0x38, 0x30, 0x47, 0x05, 0xaf, 0x27,
+	0x02, 0x19, 0x0f, 0xe5, 0x27, 0xf4, 0xff, 0x02, 0x19, 0x0f, 0xe5,
+	0x47, 0x64, 0x07, 0x60, 0x0f, 0xe5, 0x47, 0x64, 0x08, 0x60, 0x09,
+	0xe5, 0x47, 0x64, 0x09, 0x60, 0x03, 0x02, 0x18, 0x8e, 0x90, 0x02,
+	0x29, 0xe0, 0x54, 0xfc, 0xf0, 0xe5, 0x3a, 0x14, 0x60, 0x22, 0x14,
+	0x60, 0x25, 0x14, 0x60, 0x2d, 0x24, 0xfc, 0x60, 0x49, 0x24, 0xf9,
+	0x60, 0x14, 0x24, 0x0e, 0x70, 0x50, 0xe5, 0x46, 0x13, 0x13, 0x54,
+	0x3f, 0x75, 0xf0, 0x03, 0x84, 0xe5, 0xf0, 0x24, 0xff, 0x80, 0x3a,
+	0xd2, 0x39, 0xc2, 0x38, 0x80, 0x3e, 0xe5, 0x46, 0x30, 0xe2, 0x03,
+	0xd3, 0x80, 0x1d, 0xc3, 0x80, 0x1a, 0xe5, 0x46, 0x30, 0xe2, 0x0d,
+	0x54, 0x38, 0xc3, 0x94, 0x30, 0x50, 0x06, 0x7e, 0x00, 0x7f, 0x01,
+	0x80, 0x04, 0x7e, 0x00, 0x7f, 0x00, 0xee, 0x4f, 0x24, 0xff, 0x92,
+	0x38, 0xc2, 0x39, 0x80, 0x13, 0xe5, 0x46, 0x30, 0xe2, 0x03, 0xd3,
+	0x80, 0x01, 0xc3, 0x92, 0x39, 0xc2, 0x38, 0x80, 0x04, 0xc2, 0x38,
+	0xc2, 0x39, 0x30, 0x47, 0x04, 0xaf, 0x27, 0x80, 0x04, 0xe5, 0x27,
+	0xf4, 0xff, 0x02, 0x19, 0x0f, 0xe5, 0x47, 0x64, 0x0c, 0x60, 0x06,
+	0xe5, 0x47, 0x64, 0x0b, 0x70, 0x7a, 0x90, 0x02, 0x29, 0xe0, 0x54,
+	0xfd, 0xf0, 0xe5, 0x3a, 0x14, 0x60, 0x20, 0x14, 0x60, 0x21, 0x14,
+	0x60, 0x2b, 0x24, 0xfc, 0x60, 0x45, 0x24, 0xf9, 0x60, 0x12, 0x24,
+	0x0e, 0x70, 0x4a, 0xe5, 0x46, 0x13, 0x13, 0x54, 0x3f, 0x75, 0xf0,
+	0x03, 0x84, 0xe5, 0xf0, 0x80, 0x29, 0xd2, 0x39, 0x80, 0x3a, 0xe5,
+	0x46, 0x30, 0xe2, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x92, 0x39, 0x80,
+	0x2d, 0xe5, 0x46, 0x30, 0xe2, 0x0d, 0x54, 0x38, 0xc3, 0x94, 0x30,
+	0x50, 0x06, 0x7e, 0x00, 0x7f, 0x01, 0x80, 0x04, 0x7e, 0x00, 0x7f,
+	0x00, 0xee, 0x4f, 0x24, 0xff, 0x92, 0x39, 0x80, 0x0f, 0xe5, 0x46,
+	0x30, 0xe2, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x92, 0x39, 0x80, 0x02,
+	0xc2, 0x39, 0x30, 0x47, 0x04, 0xaf, 0x27, 0x80, 0x04, 0xe5, 0x27,
+	0xf4, 0xff, 0x90, 0x02, 0x28, 0xef, 0xf0, 0x22, 0xe5, 0x47, 0xb4,
+	0x0b, 0x10, 0x90, 0x02, 0x29, 0xe0, 0x54, 0xeb, 0xf0, 0xe5, 0x27,
+	0x54, 0xeb, 0x45, 0x45, 0xf5, 0x27, 0x22, 0xe4, 0x90, 0x02, 0x29,
+	0xf0, 0x30, 0x47, 0x04, 0xaf, 0x45, 0x80, 0x04, 0xe5, 0x45, 0xf4,
+	0xff, 0x90, 0x02, 0x28, 0xef, 0xf0, 0x22, 0x8f, 0x50, 0xd2, 0x59,
+	0x22, 0x8f, 0x54, 0xd2, 0x58, 0x22, 0xe4, 0xf5, 0x37, 0xc2, 0xaf,
+	0xe5, 0x51, 0x14, 0x60, 0x4a, 0x14, 0x60, 0x6b, 0x24, 0x02, 0x60,
+	0x03, 0x02, 0x1a, 0xd5, 0xd2, 0x59, 0x75, 0x55, 0x01, 0x20, 0x1a,
+	0x1c, 0x90, 0x02, 0x08, 0xe0, 0x54, 0xfe, 0xf0, 0xe0, 0x20, 0xe1,
+	0x23, 0x90, 0x04, 0x34, 0xe0, 0xb4, 0x02, 0x1c, 0xa3, 0xe0, 0xb4,
+	0x02, 0x17, 0xa3, 0xe0, 0xb4, 0x02, 0x12, 0x7f, 0x20, 0x12, 0x19,
+	0x40, 0x90, 0x10, 0x04, 0xe0, 0x54, 0xf3, 0xf0, 0x75, 0x51, 0x01,
+	0x02, 0x1a, 0xd5, 0xe5, 0x50, 0x70, 0x06, 0x75, 0x37, 0x03, 0x02,
+	0x1a, 0xd5, 0x90, 0x12, 0x00, 0xe0, 0x54, 0x03, 0x70, 0x15, 0x7f,
+	0x20, 0x12, 0x19, 0x40, 0x20, 0x1a, 0x07, 0x90, 0x02, 0x08, 0xe0,
+	0x54, 0xfb, 0xf0, 0x75, 0x51, 0x02, 0x02, 0x1a, 0xd5, 0xe5, 0x50,
+	0x70, 0x03, 0x02, 0x1a, 0xd0, 0x20, 0x1a, 0x15, 0x90, 0x02, 0x08,
+	0xe0, 0x30, 0xe3, 0x03, 0x02, 0x1a, 0xcc, 0x90, 0x04, 0x37, 0xe0,
+	0x64, 0x22, 0x60, 0x03, 0x02, 0x1a, 0xcc, 0x90, 0x12, 0x04, 0x74,
+	0x0a, 0xf0, 0xe5, 0x58, 0x30, 0xe3, 0x15, 0xe4, 0x90, 0x05, 0x00,
+	0xf0, 0xa3, 0x74, 0x08, 0xf0, 0xa3, 0x74, 0x01, 0xf0, 0x74, 0x03,
+	0xf0, 0x7f, 0x01, 0x12, 0x03, 0x30, 0x90, 0x13, 0x28, 0xe0, 0x90,
+	0x70, 0x1a, 0xf0, 0x90, 0x13, 0x29, 0xe0, 0x90, 0x70, 0x1b, 0xf0,
+	0x90, 0x13, 0x2b, 0xe0, 0x90, 0x70, 0x22, 0xf0, 0x90, 0x13, 0x28,
+	0xe0, 0x54, 0xf0, 0xf0, 0xa3, 0xe0, 0x54, 0xf0, 0xf0, 0x90, 0x13,
+	0x2b, 0xe0, 0x54, 0xcc, 0xf0, 0xe5, 0x58, 0x30, 0xe3, 0x17, 0xe5,
+	0x34, 0x70, 0x13, 0xe5, 0x3c, 0xf4, 0x90, 0x13, 0x2a, 0x60, 0x05,
+	0xe0, 0x54, 0xf3, 0x80, 0x11, 0xe0, 0x54, 0xfb, 0xf0, 0x80, 0x14,
+	0xe5, 0x3c, 0xf4, 0x90, 0x13, 0x2a, 0x60, 0x08, 0xe0, 0x54, 0xf2,
+	0x45, 0x3c, 0xf0, 0x80, 0x04, 0xe0, 0x54, 0xfa, 0xf0, 0x20, 0x1a,
+	0x07, 0x90, 0x04, 0x01, 0xe0, 0x44, 0x10, 0xf0, 0xe5, 0x34, 0xd3,
+	0x94, 0x01, 0x40, 0x09, 0xe5, 0x30, 0x70, 0x05, 0x75, 0x8c, 0x40,
+	0x80, 0x03, 0x75, 0x8c, 0x80, 0x90, 0x04, 0x01, 0xe0, 0x54, 0xfd,
+	0xf0, 0x20, 0x1a, 0x07, 0x90, 0x12, 0x04, 0xe0, 0x44, 0x04, 0xf0,
+	0xe5, 0x58, 0x30, 0xe0, 0x06, 0x90, 0x01, 0x0d, 0xe0, 0xf5, 0x31,
+	0xe5, 0x34, 0xd3, 0x94, 0x01, 0x40, 0x2c, 0x90, 0x01, 0x0d, 0xe0,
+	0x44, 0x01, 0xf0, 0xe5, 0x58, 0x20, 0xe3, 0x0c, 0xe5, 0x34, 0xb4,
+	0x03, 0x07, 0x90, 0x12, 0x04, 0xe0, 0x54, 0xfd, 0xf0, 0x20, 0x02,
+	0x11, 0x20, 0x03, 0x0e, 0x90, 0x01, 0x0d, 0xe0, 0x54, 0xfb, 0xf0,
+	0x90, 0x01, 0x0c, 0xe0, 0x54, 0xfd, 0xf0, 0x75, 0x37, 0x01, 0x75,
+	0x55, 0x02, 0xe4, 0xf5, 0x51, 0x80, 0x09, 0xe5, 0x50, 0x70, 0x05,
+	0x75, 0x37, 0x03, 0xf5, 0x51, 0xe5, 0x37, 0x60, 0x18, 0xc2, 0x01,
+	0xe4, 0xf5, 0x51, 0xc2, 0x59, 0x20, 0x1a, 0x0e, 0xad, 0x37, 0xaf,
+	0x40, 0x12, 0x1b, 0xfa, 0xe5, 0x37, 0xb4, 0x03, 0x02, 0xd2, 0x03,
+	0xd2, 0xaf, 0x22, 0xc2, 0xaf, 0x30, 0x01, 0x0e, 0xe4, 0xf5, 0x51,
+	0xc2, 0x59, 0xc2, 0x01, 0x7d, 0x02, 0xaf, 0x40, 0x12, 0x1b, 0xfa,
+	0xe5, 0x52, 0x14, 0x60, 0x56, 0x14, 0x60, 0x33, 0x24, 0x02, 0x60,
+	0x03, 0x02, 0x1b, 0xf7, 0xe5, 0x34, 0xd3, 0x94, 0x01, 0x40, 0x1f,
+	0x90, 0x01, 0x0c, 0xe0, 0x44, 0x02, 0xf0, 0xa3, 0xe0, 0x44, 0x04,
+	0xf0, 0x90, 0x12, 0x04, 0xe0, 0x44, 0x02, 0xf0, 0x7f, 0x32, 0x12,
+	0x03, 0x30, 0x90, 0x01, 0x0d, 0xe0, 0x54, 0xfe, 0xf0, 0x75, 0x52,
+	0x02, 0x75, 0x55, 0x03, 0xe5, 0x58, 0x30, 0xe0, 0x06, 0x90, 0x01,
+	0x0d, 0xe5, 0x31, 0xf0, 0x90, 0x12, 0x04, 0xe0, 0x54, 0xfb, 0xf0,
+	0x7f, 0x20, 0x12, 0x19, 0x45, 0x75, 0x52, 0x01, 0x75, 0x55, 0x03,
+	0x02, 0x1b, 0xf7, 0xe5, 0x54, 0x60, 0x03, 0x02, 0x1b, 0xf7, 0x90,
+	0x04, 0x01, 0xe0, 0x44, 0x0e, 0xf0, 0x20, 0x1a, 0x04, 0xe0, 0x54,
+	0xef, 0xf0, 0xe4, 0xf5, 0x8c, 0xe5, 0x58, 0x54, 0x18, 0x60, 0x1e,
+	0x90, 0x70, 0x1a, 0xe0, 0x90, 0x13, 0x28, 0xf0, 0x90, 0x70, 0x1b,
+	0xe0, 0x90, 0x13, 0x29, 0xf0, 0xa3, 0x74, 0x05, 0xf0, 0x90, 0x70,
+	0x22, 0xe0, 0x90, 0x13, 0x2b, 0xf0, 0x80, 0x11, 0x90, 0x13, 0x28,
+	0xe0, 0x44, 0x0f, 0xf0, 0xa3, 0xe0, 0x44, 0x0f, 0xf0, 0xa3, 0xe0,
+	0x44, 0x05, 0xf0, 0x90, 0x12, 0x04, 0x74, 0x03, 0xf0, 0xe5, 0x58,
+	0x30, 0xe3, 0x16, 0x90, 0x05, 0x00, 0x74, 0xe2, 0xf0, 0xa3, 0x74,
+	0x08, 0xf0, 0xa3, 0x74, 0x01, 0xf0, 0x74, 0x03, 0xf0, 0x7f, 0x01,
+	0x12, 0x03, 0x30, 0x20, 0x1a, 0x07, 0x90, 0x02, 0x08, 0xe0, 0x44,
+	0x05, 0xf0, 0x90, 0x10, 0x04, 0xe0, 0x44, 0x0c, 0xf0, 0xe4, 0xf5,
+	0x52, 0xf5, 0x55, 0x30, 0x02, 0x09, 0xc2, 0x02, 0x7d, 0x01, 0xaf,
+	0x41, 0x12, 0x1b, 0xfa, 0x30, 0x03, 0x02, 0xc2, 0x03, 0xd2, 0xaf,
+	0x22, 0xef, 0xf4, 0x60, 0x2d, 0xe4, 0xfe, 0x74, 0x14, 0x2e, 0xf5,
+	0x82, 0xe4, 0x34, 0x70, 0xf5, 0x83, 0xe0, 0xb4, 0xff, 0x19, 0x74,
+	0x14, 0x2e, 0xf5, 0x82, 0xe4, 0x34, 0x70, 0xf5, 0x83, 0xef, 0xf0,
+	0x74, 0x1c, 0x2e, 0xf5, 0x82, 0xe4, 0x34, 0x70, 0xf5, 0x83, 0xed,
+	0xf0, 0x22, 0x0e, 0xbe, 0x04, 0xd5, 0x22, 0x22, 0x22, 0x30, 0x1a,
+	0x77, 0x90, 0x04, 0x37, 0xe0, 0x20, 0xe5, 0x6c, 0x90, 0x04, 0x28,
+	0xe0, 0xf5, 0x38, 0xa3, 0xe0, 0xf5, 0x37, 0xf5, 0x39, 0xe4, 0xf5,
+	0x25, 0xe5, 0x39, 0x75, 0xf0, 0x80, 0xa4, 0x24, 0x00, 0xff, 0xe5,
+	0xf0, 0x34, 0x80, 0xfe, 0xe5, 0x37, 0x65, 0x39, 0x70, 0x05, 0xfc,
+	0x7d, 0x28, 0x80, 0x04, 0x7c, 0x00, 0x7d, 0x00, 0xef, 0x2d, 0xff,
+	0xee, 0x3c, 0xfe, 0x12, 0x1c, 0xa9, 0x50, 0x07, 0x90, 0x01, 0x14,
+	0xe0, 0x44, 0x02, 0xf0, 0xe5, 0x39, 0x65, 0x38, 0x60, 0x10, 0xe4,
+	0x25, 0x39, 0xff, 0xe4, 0x34, 0x80, 0x8f, 0x82, 0xf5, 0x83, 0xe0,
+	0xf5, 0x39, 0x80, 0xbb, 0x90, 0x04, 0x10, 0x74, 0x01, 0xf0, 0x90,
+	0x04, 0x28, 0xe5, 0x38, 0xf0, 0xa3, 0xe5, 0x37, 0xf0, 0x90, 0x04,
+	0x11, 0x74, 0x01, 0xf0, 0x80, 0x8d, 0xc2, 0x06, 0xd2, 0x1b, 0x22,
+	0xe5, 0x25, 0xc3, 0x94, 0x06, 0x50, 0x19, 0x8f, 0x82, 0x8e, 0x83,
+	0xe0, 0xb4, 0xff, 0x07, 0x05, 0x25, 0xe4, 0xf5, 0x24, 0x80, 0x2e,
+	0xe4, 0xf5, 0x25, 0x8f, 0x82, 0x8e, 0x83, 0xf0, 0x80, 0x24, 0xe5,
+	0x24, 0x75, 0xf0, 0x06, 0x84, 0x74, 0x08, 0x25, 0xf0, 0xf5, 0x82,
+	0xe4, 0x34, 0x10, 0xf5, 0x83, 0xe0, 0xfd, 0x8f, 0x82, 0x8e, 0x83,
+	0xe0, 0x6d, 0x70, 0x06, 0x05, 0x25, 0x05, 0x24, 0x80, 0x03, 0xe4,
+	0xf5, 0x25, 0x0f, 0xbf, 0x00, 0x01, 0x0e, 0xef, 0x54, 0x7f, 0x60,
+	0x07, 0xe5, 0x25, 0xc3, 0x94, 0x2a, 0x40, 0xab, 0xe5, 0x25, 0xb4,
+	0x2a, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x22, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x1a, 0x53, 0x88
+};
-- 
2.5.2


From fc7971d0df715f2e4c14a81e87c36cf9696d8ff9 Mon Sep 17 00:00:00 2001
From: Jeff Rizzo <riz@tastylime.net>
Date: Sun, 20 Dec 2015 08:21:24 -0800
Subject: [PATCH 07/18] Commit generated microcode for rt2860

---
 sys/dev/microcode/ral/ral-rt2860 | Bin 0 -> 8192 bytes
 1 file changed, 0 insertions(+), 0 deletions(-)
 create mode 100644 sys/dev/microcode/ral/ral-rt2860

diff --git a/sys/dev/microcode/ral/ral-rt2860 b/sys/dev/microcode/ral/ral-rt2860
new file mode 100644
index 0000000000000000000000000000000000000000..7d745ac588b086a4bf9ed4a3e26591e127c89dfa
GIT binary patch
-- 
2.5.2


From ff78d9af034d113cefc9861b7069f1ff08212c1e Mon Sep 17 00:00:00 2001
From: Jeff Rizzo <riz@tastylime.net>
Date: Sun, 20 Dec 2015 08:22:22 -0800
Subject: [PATCH 08/18] Add ieee80211_htframe struct, for rt2860.  No actual
 11n support.

---
 sys/net80211/ieee80211.h | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/sys/net80211/ieee80211.h b/sys/net80211/ieee80211.h
index 81bdad4..34c76bd 100644
--- a/sys/net80211/ieee80211.h
+++ b/sys/net80211/ieee80211.h
@@ -81,6 +81,17 @@ struct ieee80211_qosframe {
 	/* see below */
 } __packed;
 
+struct ieee80211_htframe {		/* 11n */
+	u_int8_t	i_fc[2];
+	u_int8_t	i_dur[2];
+	u_int8_t	i_addr1[IEEE80211_ADDR_LEN];
+	u_int8_t	i_addr2[IEEE80211_ADDR_LEN];
+	u_int8_t	i_addr3[IEEE80211_ADDR_LEN];
+	u_int8_t	i_seq[2];
+	u_int8_t	i_qos[2];
+	u_int8_t	i_ht[4];
+} __packed;
+
 struct ieee80211_qoscntl {
 	u_int8_t	i_qos[2];
 };
-- 
2.5.2


From b4a473517b8f452fb443d66a218a5635aa905c19 Mon Sep 17 00:00:00 2001
From: Jeff Rizzo <riz@tastylime.net>
Date: Sun, 20 Dec 2015 08:23:50 -0800
Subject: [PATCH 09/18] Add rt2860 support to ral(4), from OpenBSD.  Compiles,
 doesn't work.

---
 sys/conf/files           |    1 +
 sys/dev/ic/rt2860.c      | 3835 ++++++++++++++++++++++++++++++++++++++++++++++
 sys/dev/ic/rt2860var.h   |  209 +++
 sys/dev/pci/if_ral_pci.c |   34 +-
 4 files changed, 4075 insertions(+), 4 deletions(-)
 create mode 100644 sys/dev/ic/rt2860.c
 create mode 100644 sys/dev/ic/rt2860var.h

diff --git a/sys/conf/files b/sys/conf/files
index c7c90cd..97a53aa 100644
--- a/sys/conf/files
+++ b/sys/conf/files
@@ -664,6 +664,7 @@ file	dev/ic/rtwphyio.c		rtw
 device	ral: arp, ether, ifnet, wlan, firmload
 file	dev/ic/rt2560.c			ral
 file	dev/ic/rt2661.c			ral
+file	dev/ic/rt2860.c			ral
 
 # Marvell Libertas Open
 device  malo: arp, ether, ifnet, wlan, firmload
diff --git a/sys/dev/ic/rt2860.c b/sys/dev/ic/rt2860.c
new file mode 100644
index 0000000..3ac2f7d
--- /dev/null
+++ b/sys/dev/ic/rt2860.c
@@ -0,0 +1,3835 @@
+/*	$OpenBSD: rt2860.c,v 1.86 2015/12/11 16:07:01 mpi Exp $	*/
+
+/*-
+ * Copyright (c) 2007-2010 Damien Bergamini <damien.bergamini@free.fr>
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*-
+ * Ralink Technology RT2860/RT3090/RT3390/RT3562 chipset driver
+ * http://www.ralinktech.com/
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD$");
+
+#include <sys/param.h>
+#include <sys/sockio.h>
+#include <sys/sysctl.h>
+#include <sys/mbuf.h>
+#include <sys/kernel.h>
+#include <sys/socket.h>
+#include <sys/systm.h>
+#include <sys/malloc.h>
+#include <sys/queue.h>
+#include <sys/callout.h>
+#include <sys/module.h>
+#include <sys/conf.h>
+#include <sys/device.h>
+#include <sys/endian.h>
+#include <sys/cprng.h>
+
+#include <sys/bus.h>
+#include <sys/intr.h>
+
+#include <net/bpf.h>
+#include <net/if.h>
+#include <net/if_dl.h>
+#include <net/if_ether.h>
+#include <net/if_media.h>
+
+#include <net80211/ieee80211_var.h>
+#include <net80211/ieee80211_amrr.h>
+#include <net80211/ieee80211_radiotap.h>
+
+#include <dev/firmload.h>
+
+#include <dev/ic/rt2860var.h>
+#include <dev/ic/rt2860reg.h>
+
+#include <dev/pci/pcidevs.h>
+
+#define RAL_DEBUG
+#ifdef RAL_DEBUG
+#define DPRINTF(x)	do { if (rt2860_debug > 0) printf x; } while (0)
+#define DPRINTFN(n, x)	do { if (rt2860_debug >= (n)) printf x; } while (0)
+int rt2860_debug = 0;
+#else
+#define DPRINTF(x)
+#define DPRINTFN(n, x)
+#endif
+
+void		rt2860_attachhook(struct device *);
+int		rt2860_alloc_tx_ring(struct rt2860_softc *,
+		    struct rt2860_tx_ring *);
+void		rt2860_reset_tx_ring(struct rt2860_softc *,
+		    struct rt2860_tx_ring *);
+void		rt2860_free_tx_ring(struct rt2860_softc *,
+		    struct rt2860_tx_ring *);
+int		rt2860_alloc_tx_pool(struct rt2860_softc *);
+void		rt2860_free_tx_pool(struct rt2860_softc *);
+int		rt2860_alloc_rx_ring(struct rt2860_softc *,
+		    struct rt2860_rx_ring *);
+void		rt2860_reset_rx_ring(struct rt2860_softc *,
+		    struct rt2860_rx_ring *);
+void		rt2860_free_rx_ring(struct rt2860_softc *,
+		    struct rt2860_rx_ring *);
+struct		ieee80211_node *rt2860_node_alloc(struct ieee80211_node_table *);
+static int	rt2860_media_change(struct ifnet *);
+void		rt2860_iter_func(void *, struct ieee80211_node *);
+void		rt2860_updatestats(struct rt2860_softc *);
+void		rt2860_newassoc(struct ieee80211_node *,
+		    int);
+int		rt2860_ampdu_rx_start(struct ieee80211com *,
+		    struct ieee80211_node *, uint8_t);
+void		rt2860_ampdu_rx_stop(struct ieee80211com *,
+		    struct ieee80211_node *, uint8_t);
+int		rt2860_newstate(struct ieee80211com *, enum ieee80211_state,
+		    int);
+uint16_t	rt3090_efuse_read_2(struct rt2860_softc *, uint16_t);
+uint16_t	rt2860_eeprom_read_2(struct rt2860_softc *, uint16_t);
+void		rt2860_intr_coherent(struct rt2860_softc *);
+void		rt2860_drain_stats_fifo(struct rt2860_softc *);
+void		rt2860_tx_intr(struct rt2860_softc *, int);
+void		rt2860_rx_intr(struct rt2860_softc *);
+void		rt2860_tbtt_intr(struct rt2860_softc *);
+void		rt2860_gp_intr(struct rt2860_softc *);
+int		rt2860_tx(struct rt2860_softc *, struct mbuf *,
+		    struct ieee80211_node *);
+void		rt2860_start(struct ifnet *);
+void		rt2860_watchdog(struct ifnet *);
+int		rt2860_ioctl(struct ifnet *, u_long, void *);
+void		rt2860_mcu_bbp_write(struct rt2860_softc *, uint8_t, uint8_t);
+uint8_t		rt2860_mcu_bbp_read(struct rt2860_softc *, uint8_t);
+void		rt2860_rf_write(struct rt2860_softc *, uint8_t, uint32_t);
+uint8_t		rt3090_rf_read(struct rt2860_softc *, uint8_t);
+void		rt3090_rf_write(struct rt2860_softc *, uint8_t, uint8_t);
+int		rt2860_mcu_cmd(struct rt2860_softc *, uint8_t, uint16_t, int);
+void		rt2860_enable_mrr(struct rt2860_softc *);
+void		rt2860_set_txpreamble(struct rt2860_softc *);
+void		rt2860_set_basicrates(struct rt2860_softc *);
+void		rt2860_select_chan_group(struct rt2860_softc *, int);
+void		rt2860_set_chan(struct rt2860_softc *, u_int);
+void		rt3090_set_chan(struct rt2860_softc *, u_int);
+int		rt3090_rf_init(struct rt2860_softc *);
+void		rt3090_rf_wakeup(struct rt2860_softc *);
+int		rt3090_filter_calib(struct rt2860_softc *, uint8_t, uint8_t,
+		    uint8_t *);
+void		rt3090_rf_setup(struct rt2860_softc *);
+void		rt2860_set_leds(struct rt2860_softc *, uint16_t);
+void		rt2860_set_gp_timer(struct rt2860_softc *, int);
+void		rt2860_set_bssid(struct rt2860_softc *, const uint8_t *);
+void		rt2860_set_macaddr(struct rt2860_softc *, const uint8_t *);
+void		rt2860_updateslot(struct ifnet *);
+void		rt2860_updateprot(struct ieee80211com *);
+static int	rt2860_updateedca(struct ieee80211com *);
+static int	rt2860_set_key(struct ieee80211com *, 
+		    const struct ieee80211_key *, const uint8_t *);
+static int	rt2860_delete_key(struct ieee80211com *,
+		    const struct ieee80211_key *);
+int8_t		rt2860_rssi2dbm(struct rt2860_softc *, uint8_t, uint8_t);
+const char *	rt2860_get_rf(uint8_t);
+int		rt2860_read_eeprom(struct rt2860_softc *);
+int		rt2860_bbp_init(struct rt2860_softc *);
+int		rt2860_txrx_enable(struct rt2860_softc *);
+int		rt2860_init(struct ifnet *);
+void		rt2860_stop(struct ifnet *, int);
+int		rt2860_load_microcode(struct rt2860_softc *);
+void		rt2860_calib(struct rt2860_softc *);
+void		rt3090_set_rx_antenna(struct rt2860_softc *, int);
+void		rt2860_switch_chan(struct rt2860_softc *,
+		    struct ieee80211_channel *);
+#ifndef IEEE80211_STA_ONLY
+int		rt2860_setup_beacon(struct rt2860_softc *);
+#endif
+void		rt2860_enable_tsf_sync(struct rt2860_softc *);
+
+static const struct {
+	uint32_t	reg;
+	uint32_t	val;
+} rt2860_def_mac[] = {
+	RT2860_DEF_MAC
+};
+
+static const struct {
+	uint8_t	reg;
+	uint8_t	val;
+} rt2860_def_bbp[] = {
+	RT2860_DEF_BBP
+};
+
+static const struct rfprog {
+	uint8_t		chan;
+	uint32_t	r1, r2, r3, r4;
+} rt2860_rf2850[] = {
+	RT2860_RF2850
+};
+
+struct {
+	uint8_t	n, r, k;
+} rt3090_freqs[] = {
+	RT3070_RF3052
+};
+
+static const struct {
+	uint8_t	reg;
+	uint8_t	val;
+}  rt3090_def_rf[] = {
+	RT3070_DEF_RF
+}, rt3572_def_rf[] = {
+	RT3572_DEF_RF
+};
+
+int
+rt2860_attach(void *xsc, int id)
+{
+	struct rt2860_softc *sc = xsc;
+	struct ieee80211com *ic = &sc->sc_ic;
+	int qid, ntries, error;
+	uint32_t tmp;
+
+	aprint_normal_dev(sc->sc_dev, "in rt2860_attach()\n");
+	sc->amrr.amrr_min_success_threshold =  1;
+	sc->amrr.amrr_max_success_threshold = 15;
+
+	/* wait for NIC to initialize */
+	for (ntries = 0; ntries < 100; ntries++) {
+		aprint_normal_dev(sc->sc_dev, "reading ASIC\n");
+		tmp = RAL_READ(sc, RT2860_ASIC_VER_ID);
+		if (tmp != 0 && tmp != 0xffffffff)
+			break;
+		DELAY(10);
+	}
+	if (ntries == 100) {
+		aprint_error_dev(sc->sc_dev, 
+		    "timeout waiting for NIC to initialize\n");
+		return ETIMEDOUT;
+	}
+	sc->mac_ver = tmp >> 16;
+	sc->mac_rev = tmp & 0xffff;
+
+	if (sc->mac_ver != 0x2860 &&
+	    (id == PCI_PRODUCT_RALINK_RT2890 ||
+	     id == PCI_PRODUCT_RALINK_RT2790 ||
+	     id == PCI_PRODUCT_AWT_RT2890))
+		sc->sc_flags |= RT2860_ADVANCED_PS;
+
+	aprint_normal_dev(sc->sc_dev, "reading eeprom\n");
+	/* retrieve RF rev. no and various other things from EEPROM */
+	rt2860_read_eeprom(sc);
+	aprint_normal_dev(sc->sc_dev, "802.11 address %s\n",
+	    ether_sprintf(ic->ic_myaddr));
+	aprint_normal_dev(sc->sc_dev, "MAC/BBP RT%X (rev 0x%04X), RF %s (MIMO %dT%dR)\n",
+	    sc->mac_ver, sc->mac_rev, rt2860_get_rf(sc->rf_rev),
+	    sc->ntxchains, sc->nrxchains);
+
+	/*
+	 * Allocate Tx (4 EDCAs + HCCA + Mgt) and Rx rings.
+	 */
+	for (qid = 0; qid < 6; qid++) {
+		if ((error = rt2860_alloc_tx_ring(sc, &sc->txq[qid])) != 0) {
+			aprint_error_dev(sc->sc_dev,
+			    "could not allocate Tx ring %d\n", qid);
+			goto fail1;
+		}
+	}
+
+	if ((error = rt2860_alloc_rx_ring(sc, &sc->rxq)) != 0) {
+		aprint_error_dev(sc->sc_dev, "could not allocate Rx ring\n");
+		goto fail1;
+	}
+
+	if ((error = rt2860_alloc_tx_pool(sc)) != 0) {
+		aprint_error_dev(sc->sc_dev, "could not allocate Tx pool\n");
+		goto fail2;
+	}
+
+	/* mgmt ring is broken on RT2860C, use EDCA AC VO ring instead */
+	sc->mgtqid = (sc->mac_ver == 0x2860 && sc->mac_rev == 0x0100) ?
+	    WME_AC_VO : 5;
+
+	config_mountroot(xsc, rt2860_attachhook);
+
+	return 0;
+
+fail2:	rt2860_free_rx_ring(sc, &sc->rxq);
+fail1:	while (--qid >= 0)
+		rt2860_free_tx_ring(sc, &sc->txq[qid]);
+	return error;
+}
+
+/* XXX */
+static int
+firmware_load(const char *dname, const char *iname, uint8_t **ucodep,
+    size_t *sizep)
+{
+	firmware_handle_t fh;
+	int error;
+
+	if ((error = firmware_open(dname, iname, &fh)) != 0)
+		return (error);
+	*sizep = firmware_get_size(fh);
+	if ((*ucodep = firmware_malloc(*sizep)) == NULL) {
+		firmware_close(fh);
+		return (ENOMEM);
+	}
+	if ((error = firmware_read(fh, 0, *ucodep, *sizep)) != 0)
+		firmware_free(*ucodep, *sizep);
+	firmware_close(fh);
+
+	return (error);
+}
+
+void
+rt2860_attachhook(struct device *self)
+{
+	struct rt2860_softc *sc = (struct rt2860_softc *)self;
+	struct ieee80211com *ic = &sc->sc_ic;
+	struct ifnet *ifp = &sc->sc_if;
+	int i, error;
+
+	error = firmware_load("ral", "ral-rt2860", &sc->ucode, &sc->ucsize);
+	if (error != 0) {
+		aprint_error_dev(sc->sc_dev,
+		    "error %d, could not read firmware file %s\n",
+		    error, "ral-rt2860");
+		return;
+	}
+
+	ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
+	ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
+	ic->ic_state = IEEE80211_S_INIT;
+
+	/* set device capabilities */
+	ic->ic_caps =
+	    IEEE80211_C_MONITOR |	/* monitor mode supported */
+#ifndef IEEE80211_STA_ONLY
+	    IEEE80211_C_IBSS |		/* IBSS mode supported */
+	    IEEE80211_C_HOSTAP |	/* HostAP mode supported */
+// XXX?	    IEEE80211_C_APPMGT |	/* HostAP power management */
+#endif
+	    IEEE80211_C_SHPREAMBLE |	/* short preamble supported */
+	    IEEE80211_C_SHSLOT |	/* short slot time supported */
+	    IEEE80211_C_WEP |		/* s/w WEP */
+	    IEEE80211_C_WPA;		/* WPA/RSN */
+
+	if (sc->rf_rev == RT2860_RF_2750 || sc->rf_rev == RT2860_RF_2850) {
+		/* set supported .11a rates */
+		ic->ic_sup_rates[IEEE80211_MODE_11A] =
+		    ieee80211_std_rateset_11a;
+
+		/* set supported .11a channels */
+		for (i = 14; i < (int)__arraycount(rt2860_rf2850); i++) {
+			uint8_t chan = rt2860_rf2850[i].chan;
+			ic->ic_channels[chan].ic_freq =
+			    ieee80211_ieee2mhz(chan, IEEE80211_CHAN_5GHZ);
+			ic->ic_channels[chan].ic_flags = IEEE80211_CHAN_A;
+		}
+	}
+
+	/* set supported .11b and .11g rates */
+	ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b;
+	ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g;
+
+	/* set supported .11b and .11g channels (1 through 14) */
+	for (i = 1; i <= 14; i++) {
+		ic->ic_channels[i].ic_freq =
+		    ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
+		ic->ic_channels[i].ic_flags =
+		    IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
+		    IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
+	}
+
+	/* HW supports up to 255 STAs (0-254) in HostAP and IBSS modes */
+	ic->ic_max_aid = min(IEEE80211_AID_MAX, RT2860_WCID_MAX);
+
+	ifp->if_softc = sc;
+	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
+	ifp->if_ioctl = rt2860_ioctl;
+	ifp->if_start = rt2860_start;
+	ifp->if_watchdog = rt2860_watchdog;
+	IFQ_SET_READY(&ifp->if_snd);
+	memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ);
+
+	if_attach(ifp);
+	ieee80211_ifattach(ic);
+	ic->ic_node_alloc = rt2860_node_alloc;
+	ic->ic_newassoc = rt2860_newassoc;
+#ifndef IEEE80211_NO_HT
+	ic->ic_ampdu_rx_start = rt2860_ampdu_rx_start;
+	ic->ic_ampdu_rx_stop = rt2860_ampdu_rx_stop;
+#endif
+	ic->ic_updateslot = rt2860_updateslot;
+	ic->ic_wme.wme_update = rt2860_updateedca;
+	ic->ic_crypto.cs_key_set = rt2860_set_key;
+	ic->ic_crypto.cs_key_delete = rt2860_delete_key;
+	/* override state transition machine */
+	sc->sc_newstate = ic->ic_newstate;
+	ic->ic_newstate = rt2860_newstate;
+	ieee80211_media_init(ic, rt2860_media_change, ieee80211_media_status);
+
+	bpf_attach2(ifp, DLT_IEEE802_11_RADIO,
+	    sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf);
+
+	sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
+	sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
+	sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2860_RX_RADIOTAP_PRESENT);
+
+	sc->sc_txtap_len = sizeof sc->sc_txtapu;
+	sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
+	sc->sc_txtap.wt_ihdr.it_present = htole32(RT2860_TX_RADIOTAP_PRESENT);
+}
+
+int
+rt2860_detach(void *xsc)
+{
+	struct rt2860_softc *sc = xsc;
+	struct ifnet *ifp = &sc->sc_if;
+	int qid;
+
+	ieee80211_ifdetach(&sc->sc_ic);	/* free all nodes */
+	if_detach(ifp);
+
+	for (qid = 0; qid < 6; qid++)
+		rt2860_free_tx_ring(sc, &sc->txq[qid]);
+	rt2860_free_rx_ring(sc, &sc->rxq);
+	rt2860_free_tx_pool(sc);
+
+	if (sc->ucode != NULL)
+		free(sc->ucode, M_DEVBUF);
+
+	return 0;
+}
+
+void
+rt2860_suspend(void *xsc)
+{
+	struct rt2860_softc *sc = xsc;
+	struct ifnet *ifp = &sc->sc_if;
+
+	if (ifp->if_flags & IFF_RUNNING)
+		rt2860_stop(ifp, 1);
+}
+
+void
+rt2860_wakeup(void *xsc)
+{
+	struct rt2860_softc *sc = xsc;
+	struct ifnet *ifp = &sc->sc_if;
+
+	if (ifp->if_flags & IFF_UP)
+		rt2860_init(ifp);
+}
+
+int
+rt2860_alloc_tx_ring(struct rt2860_softc *sc, struct rt2860_tx_ring *ring)
+{
+	int nsegs, size, error;
+
+	size = RT2860_TX_RING_COUNT * sizeof (struct rt2860_txd);
+
+	error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
+	    BUS_DMA_NOWAIT, &ring->map);
+	if (error != 0) {
+		aprint_error_dev(sc->sc_dev, "could not create DMA map\n");
+		goto fail;
+	}
+
+	/* Tx rings must be 4-DWORD aligned */
+	error = bus_dmamem_alloc(sc->sc_dmat, size, 16, 0, &ring->seg, 1,
+	    &nsegs, BUS_DMA_NOWAIT);
+	if (error != 0) {
+		aprint_error_dev(sc->sc_dev,
+		    "could not allocate DMA memory\n");
+		goto fail;
+	}
+
+	error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, size,
+	    (void **)&ring->txd, BUS_DMA_NOWAIT);
+	if (error != 0) {
+		aprint_error_dev(sc->sc_dev, "can't map DMA memory\n");
+		goto fail;
+	}
+
+	error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->txd, size, NULL,
+	    BUS_DMA_NOWAIT);
+	if (error != 0) {
+		aprint_error_dev(sc->sc_dev, "could not load DMA map\n");
+		goto fail;
+	}
+
+	bus_dmamap_sync(sc->sc_dmat, ring->map, 0, size, BUS_DMASYNC_PREWRITE);
+
+	ring->paddr = ring->map->dm_segs[0].ds_addr;
+
+	return 0;
+
+fail:	rt2860_free_tx_ring(sc, ring);
+	return error;
+}
+
+void
+rt2860_reset_tx_ring(struct rt2860_softc *sc, struct rt2860_tx_ring *ring)
+{
+	struct rt2860_tx_data *data;
+	int i;
+
+	for (i = 0; i < RT2860_TX_RING_COUNT; i++) {
+		if ((data = ring->data[i]) == NULL)
+			continue;	/* nothing mapped in this slot */
+
+		bus_dmamap_sync(sc->sc_dmat, data->map, 0,
+		    data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
+		bus_dmamap_unload(sc->sc_dmat, data->map);
+		m_freem(data->m);
+		data->m= NULL;
+		data->ni = NULL;	/* node already freed */
+
+		SLIST_INSERT_HEAD(&sc->data_pool, data, next);
+		ring->data[i] = NULL;
+	}
+
+	ring->queued = 0;
+	ring->cur = ring->next = 0;
+}
+
+void
+rt2860_free_tx_ring(struct rt2860_softc *sc, struct rt2860_tx_ring *ring)
+{
+	struct rt2860_tx_data *data;
+	int i;
+
+	if (ring->txd != NULL) {
+		bus_dmamap_sync(sc->sc_dmat, ring->map, 0,
+		    ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
+		bus_dmamap_unload(sc->sc_dmat, ring->map);
+		bus_dmamem_unmap(sc->sc_dmat, (void *)ring->txd,
+		    RT2860_TX_RING_COUNT * sizeof (struct rt2860_txd));
+		bus_dmamem_free(sc->sc_dmat, &ring->seg, 1);
+	}
+	if (ring->map != NULL)
+		bus_dmamap_destroy(sc->sc_dmat, ring->map);
+
+	for (i = 0; i < RT2860_TX_RING_COUNT; i++) {
+		if ((data = ring->data[i]) == NULL)
+			continue;	/* nothing mapped in this slot */
+
+		bus_dmamap_sync(sc->sc_dmat, data->map, 0,
+		    data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
+		bus_dmamap_unload(sc->sc_dmat, data->map);
+		m_freem(data->m);
+
+		SLIST_INSERT_HEAD(&sc->data_pool, data, next);
+	}
+}
+
+/*
+ * Allocate a pool of TX Wireless Information blocks.
+ */
+int
+rt2860_alloc_tx_pool(struct rt2860_softc *sc)
+{
+	uintptr_t vaddr;
+	bus_addr_t paddr;
+	int i, nsegs, size, error;
+
+	size = RT2860_TX_POOL_COUNT * RT2860_TXWI_DMASZ;
+
+	/* init data_pool early in case of failure.. */
+	SLIST_INIT(&sc->data_pool);
+
+	error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
+	    BUS_DMA_NOWAIT, &sc->txwi_map);
+	if (error != 0) {
+		aprint_error_dev(sc->sc_dev, "could not create DMA map\n");
+		goto fail;
+	}
+
+	error = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0,
+	    &sc->txwi_seg, 1, &nsegs, BUS_DMA_NOWAIT);
+	if (error != 0) {
+		aprint_error_dev(sc->sc_dev,
+		    "could not allocate DMA memory\n");
+		goto fail;
+	}
+
+	error = bus_dmamem_map(sc->sc_dmat, &sc->txwi_seg, nsegs, size,
+	    &sc->txwi_vaddr, BUS_DMA_NOWAIT);
+	if (error != 0) {
+		aprint_error_dev(sc->sc_dev, "can't map DMA memory\n");
+		goto fail;
+	}
+
+	error = bus_dmamap_load(sc->sc_dmat, sc->txwi_map, sc->txwi_vaddr,
+	    size, NULL, BUS_DMA_NOWAIT);
+	if (error != 0) {
+		aprint_error_dev(sc->sc_dev, "could not load DMA map\n");
+		goto fail;
+	}
+
+	bus_dmamap_sync(sc->sc_dmat, sc->txwi_map, 0, size,
+	    BUS_DMASYNC_PREWRITE);
+
+	vaddr = (uintptr_t)sc->txwi_vaddr;
+	paddr = sc->txwi_map->dm_segs[0].ds_addr;
+	for (i = 0; i < RT2860_TX_POOL_COUNT; i++) {
+		struct rt2860_tx_data *data = &sc->data[i];
+
+		error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
+		    RT2860_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT,
+		    &data->map);
+		if (error != 0) {
+			aprint_error_dev(sc->sc_dev,
+			    "could not create DMA map\n");
+			goto fail;
+		}
+		data->txwi = (struct rt2860_txwi *)vaddr;
+		data->paddr = paddr;
+		vaddr += RT2860_TXWI_DMASZ;
+		paddr += RT2860_TXWI_DMASZ;
+
+		SLIST_INSERT_HEAD(&sc->data_pool, data, next);
+	}
+
+	return 0;
+
+fail:	rt2860_free_tx_pool(sc);
+	return error;
+}
+
+void
+rt2860_free_tx_pool(struct rt2860_softc *sc)
+{
+	if (sc->txwi_vaddr != NULL) {
+		bus_dmamap_sync(sc->sc_dmat, sc->txwi_map, 0,
+		    sc->txwi_map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
+		bus_dmamap_unload(sc->sc_dmat, sc->txwi_map);
+		bus_dmamem_unmap(sc->sc_dmat, sc->txwi_vaddr,
+		    RT2860_TX_POOL_COUNT * RT2860_TXWI_DMASZ);
+		bus_dmamem_free(sc->sc_dmat, &sc->txwi_seg, 1);
+	}
+	if (sc->txwi_map != NULL)
+		bus_dmamap_destroy(sc->sc_dmat, sc->txwi_map);
+
+	while (!SLIST_EMPTY(&sc->data_pool)) {
+		struct rt2860_tx_data *data;
+		data = SLIST_FIRST(&sc->data_pool);
+		bus_dmamap_destroy(sc->sc_dmat, data->map);
+		SLIST_REMOVE_HEAD(&sc->data_pool, next);
+	}
+}
+
+int
+rt2860_alloc_rx_ring(struct rt2860_softc *sc, struct rt2860_rx_ring *ring)
+{
+	int i, nsegs, size, error;
+
+	size = RT2860_RX_RING_COUNT * sizeof (struct rt2860_rxd);
+
+	error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
+	    BUS_DMA_NOWAIT, &ring->map);
+	if (error != 0) {
+		aprint_error_dev(sc->sc_dev, "could not create DMA map\n");
+		goto fail;
+	}
+
+	/* Rx ring must be 4-DWORD aligned */
+	error = bus_dmamem_alloc(sc->sc_dmat, size, 16, 0, &ring->seg, 1,
+	    &nsegs, BUS_DMA_NOWAIT);
+	if (error != 0) {
+		aprint_error_dev(sc->sc_dev,
+		    "could not allocate DMA memory\n");
+		goto fail;
+	}
+
+	error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, size,
+	    (void **)&ring->rxd, BUS_DMA_NOWAIT);
+	if (error != 0) {
+		aprint_error_dev(sc->sc_dev, "can't map DMA memory\n");
+		goto fail;
+	}
+
+	error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->rxd, size, NULL,
+	    BUS_DMA_NOWAIT);
+	if (error != 0) {
+		aprint_error_dev(sc->sc_dev, "could not load DMA map\n");
+		goto fail;
+	}
+
+	ring->paddr = ring->map->dm_segs[0].ds_addr;
+
+	for (i = 0; i < RT2860_RX_RING_COUNT; i++) {
+		struct rt2860_rx_data *data = &ring->data[i];
+		struct rt2860_rxd *rxd = &ring->rxd[i];
+
+		error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES,
+		    0, BUS_DMA_NOWAIT, &data->map);
+		if (error != 0) {
+			aprint_error_dev(sc->sc_dev,
+			    "could not create DMA map\n");
+			goto fail;
+		}
+
+		MGET(data->m, M_DONTWAIT, MT_DATA);
+		if (data->m == NULL) {
+			aprint_error_dev(sc->sc_dev,
+			    "could not allocate Rx mbuf\n");
+			error = ENOBUFS;
+			goto fail;
+		}
+		MCLGET(data->m, M_DONTWAIT);
+		if ((data->m->m_flags & M_EXT) == 0) {
+			aprint_error_dev(sc->sc_dev,
+			    "could not allocate Rx mbuf cluster\n");
+                        error = ENOBUFS;
+			goto fail;
+		}
+
+
+		error = bus_dmamap_load(sc->sc_dmat, data->map,
+		    mtod(data->m, void *), MCLBYTES, NULL,
+		    BUS_DMA_READ | BUS_DMA_NOWAIT);
+		if (error != 0) {
+			aprint_error_dev(sc->sc_dev,
+			    "could not load DMA map\n");
+			goto fail;
+		}
+
+		rxd->sdp0 = htole32(data->map->dm_segs[0].ds_addr);
+		rxd->sdl0 = htole16(MCLBYTES);
+	}
+
+	bus_dmamap_sync(sc->sc_dmat, ring->map, 0, size, BUS_DMASYNC_PREWRITE);
+
+	return 0;
+
+fail:	rt2860_free_rx_ring(sc, ring);
+	return error;
+}
+
+void
+rt2860_reset_rx_ring(struct rt2860_softc *sc, struct rt2860_rx_ring *ring)
+{
+	int i;
+
+	for (i = 0; i < RT2860_RX_RING_COUNT; i++)
+		ring->rxd[i].sdl0 &= ~htole16(RT2860_RX_DDONE);
+
+	bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
+	    BUS_DMASYNC_PREWRITE);
+
+	ring->cur = 0;
+}
+
+void
+rt2860_free_rx_ring(struct rt2860_softc *sc, struct rt2860_rx_ring *ring)
+{
+	int i;
+
+	if (ring->rxd != NULL) {
+		bus_dmamap_sync(sc->sc_dmat, ring->map, 0,
+		    ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
+		bus_dmamap_unload(sc->sc_dmat, ring->map);
+		bus_dmamem_unmap(sc->sc_dmat, (void *)ring->rxd,
+		    RT2860_RX_RING_COUNT * sizeof (struct rt2860_rxd));
+		bus_dmamem_free(sc->sc_dmat, &ring->seg, 1);
+	}
+	if (ring->map != NULL)
+		bus_dmamap_destroy(sc->sc_dmat, ring->map);
+
+	for (i = 0; i < RT2860_RX_RING_COUNT; i++) {
+		struct rt2860_rx_data *data = &ring->data[i];
+
+		if (data->m != NULL) {
+			bus_dmamap_sync(sc->sc_dmat, data->map, 0,
+			    data->map->dm_mapsize, BUS_DMASYNC_POSTREAD);
+			bus_dmamap_unload(sc->sc_dmat, data->map);
+			m_freem(data->m);
+		}
+		if (data->map != NULL)
+			bus_dmamap_destroy(sc->sc_dmat, data->map);
+	}
+}
+
+struct ieee80211_node *
+rt2860_node_alloc(struct ieee80211_node_table *nt)
+{
+	struct rt2860_node *rn = 
+	    malloc(sizeof (struct rt2860_node), M_DEVBUF, M_NOWAIT | M_ZERO);
+	return (rn) ? &rn->ni : NULL;
+}
+
+static int
+rt2860_media_change(struct ifnet *ifp)
+{
+	struct rt2860_softc *sc = ifp->if_softc;
+	struct ieee80211com *ic = &sc->sc_ic;
+	uint8_t rate, ridx;
+	int error;
+
+	error = ieee80211_media_change(ifp);
+	if (error != ENETRESET)
+		return error;
+
+	if (ic->ic_fixed_rate != -1) {
+		rate = ic->ic_sup_rates[ic->ic_curmode].
+		    rs_rates[ic->ic_fixed_rate] & IEEE80211_RATE_VAL;
+		for (ridx = 0; ridx <= RT2860_RIDX_MAX; ridx++)
+			if (rt2860_rates[ridx].rate == rate)
+				break;
+		sc->fixed_ridx = ridx;
+	}
+
+	if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
+	    (IFF_UP | IFF_RUNNING)) {
+		rt2860_stop(ifp, 0);
+		rt2860_init(ifp);
+	}
+	return 0;
+}
+
+void
+rt2860_iter_func(void *arg, struct ieee80211_node *ni)
+{
+	struct rt2860_softc *sc = arg;
+	uint8_t wcid = ((struct rt2860_node *)ni)->wcid;
+
+	ieee80211_amrr_choose(&sc->amrr, ni, &sc->amn[wcid]);
+}
+
+void
+rt2860_updatestats(struct rt2860_softc *sc)
+{
+	struct ieee80211com *ic = &sc->sc_ic;
+
+#ifndef IEEE80211_STA_ONLY
+	/*
+	 * In IBSS or HostAP modes (when the hardware sends beacons), the
+	 * MAC can run into a livelock and start sending CTS-to-self frames
+	 * like crazy if protection is enabled.  Fortunately, we can detect
+	 * when such a situation occurs and reset the MAC.
+	 */
+	if (ic->ic_curmode != IEEE80211_M_STA) {
+		/* check if we're in a livelock situation.. */
+		uint32_t tmp = RAL_READ(sc, RT2860_DEBUG);
+		if ((tmp & (1 << 29)) && (tmp & (1 << 7 | 1 << 5))) {
+			/* ..and reset MAC/BBP for a while.. */
+			DPRINTF(("CTS-to-self livelock detected\n"));
+			RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, RT2860_MAC_SRST);
+			RAL_BARRIER_WRITE(sc);
+			DELAY(1);
+			RAL_WRITE(sc, RT2860_MAC_SYS_CTRL,
+			    RT2860_MAC_RX_EN | RT2860_MAC_TX_EN);
+		}
+	}
+#endif
+	if (ic->ic_opmode == IEEE80211_M_STA)
+		rt2860_iter_func(sc, ic->ic_bss);
+#ifndef IEEE80211_STA_ONLY
+	else
+		ieee80211_iterate_nodes(&ic->ic_sta, rt2860_iter_func, sc);
+#endif
+}
+
+void
+rt2860_newassoc(struct ieee80211_node *ni, int isnew)
+{
+	struct rt2860_softc *sc = ni->ni_ic->ic_ifp->if_softc;
+	struct rt2860_node *rn = (void *)ni;
+	struct ieee80211_rateset *rs = &ni->ni_rates;
+	uint8_t rate, wcid = 0;
+	int ridx, i, j;
+
+	if (isnew && ni->ni_associd != 0) {
+		/* only interested in true associations */
+		wcid = rn->wcid = IEEE80211_AID(ni->ni_associd);
+
+		/* init WCID table entry */
+		RAL_WRITE_REGION_1(sc, RT2860_WCID_ENTRY(wcid),
+		    ni->ni_macaddr, IEEE80211_ADDR_LEN);
+	}
+	DPRINTF(("new assoc isnew=%d addr=%s WCID=%d\n",
+	    isnew, ether_sprintf(ni->ni_macaddr), wcid));
+
+	ieee80211_amrr_node_init(&sc->amrr, &sc->amn[wcid]);
+	/* start at lowest available bit-rate, AMRR will raise */
+	ni->ni_txrate = 0;
+
+	for (i = 0; i < rs->rs_nrates; i++) {
+		rate = rs->rs_rates[i] & IEEE80211_RATE_VAL;
+		/* convert 802.11 rate to hardware rate index */
+		for (ridx = 0; ridx < RT2860_RIDX_MAX; ridx++)
+			if (rt2860_rates[ridx].rate == rate)
+				break;
+		rn->ridx[i] = ridx;
+		/* determine rate of control response frames */
+		for (j = i; j >= 0; j--) {
+			if ((rs->rs_rates[j] & IEEE80211_RATE_BASIC) &&
+			    rt2860_rates[rn->ridx[i]].phy ==
+			    rt2860_rates[rn->ridx[j]].phy)
+				break;
+		}
+		if (j >= 0) {
+			rn->ctl_ridx[i] = rn->ridx[j];
+		} else {
+			/* no basic rate found, use mandatory one */
+			rn->ctl_ridx[i] = rt2860_rates[ridx].ctl_ridx;
+		}
+		DPRINTF(("rate=0x%02x ridx=%d ctl_ridx=%d\n",
+		    rs->rs_rates[i], rn->ridx[i], rn->ctl_ridx[i]));
+	}
+}
+
+#ifndef IEEE80211_NO_HT
+int
+rt2860_ampdu_rx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
+    uint8_t tid)
+{
+	struct rt2860_softc *sc = ic->ic_softc;
+	uint8_t wcid = ((struct rt2860_node *)ni)->wcid;
+	uint32_t tmp;
+
+	/* update BA session mask */
+	tmp = RAL_READ(sc, RT2860_WCID_ENTRY(wcid) + 4);
+	tmp |= (1 << tid) << 16;
+	RAL_WRITE(sc, RT2860_WCID_ENTRY(wcid) + 4, tmp);
+	return 0;
+}
+
+void
+rt2860_ampdu_rx_stop(struct ieee80211com *ic, struct ieee80211_node *ni,
+    uint8_t tid)
+{
+	struct rt2860_softc *sc = ic->ic_softc;
+	uint8_t wcid = ((struct rt2860_node *)ni)->wcid;
+	uint32_t tmp;
+
+	/* update BA session mask */
+	tmp = RAL_READ(sc, RT2860_WCID_ENTRY(wcid) + 4);
+	tmp &= ~((1 << tid) << 16);
+	RAL_WRITE(sc, RT2860_WCID_ENTRY(wcid) + 4, tmp);
+}
+#endif
+
+int
+rt2860_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
+{
+	struct rt2860_softc *sc = ic->ic_ifp->if_softc;
+	enum ieee80211_state ostate;
+	uint32_t tmp;
+
+	ostate = ic->ic_state;
+
+	if (ostate == IEEE80211_S_RUN) {
+		/* turn link LED off */
+		rt2860_set_leds(sc, RT2860_LED_RADIO);
+	}
+
+	switch (nstate) {
+	case IEEE80211_S_INIT:
+		if (ostate == IEEE80211_S_RUN) {
+			/* abort TSF synchronization */
+			tmp = RAL_READ(sc, RT2860_BCN_TIME_CFG);
+			RAL_WRITE(sc, RT2860_BCN_TIME_CFG,
+			    tmp & ~(RT2860_BCN_TX_EN | RT2860_TSF_TIMER_EN |
+			    RT2860_TBTT_TIMER_EN));
+		}
+		rt2860_set_gp_timer(sc, 0);
+		break;
+
+	case IEEE80211_S_SCAN:
+		rt2860_switch_chan(sc, ic->ic_bss->ni_chan);
+		if (ostate != IEEE80211_S_SCAN)
+			rt2860_set_gp_timer(sc, 150);
+		break;
+
+	case IEEE80211_S_AUTH:
+	case IEEE80211_S_ASSOC:
+		rt2860_set_gp_timer(sc, 0);
+		rt2860_switch_chan(sc, ic->ic_bss->ni_chan);
+		break;
+
+	case IEEE80211_S_RUN:
+		rt2860_set_gp_timer(sc, 0);
+		rt2860_switch_chan(sc, ic->ic_bss->ni_chan);
+
+		if (ic->ic_opmode != IEEE80211_M_MONITOR) {
+			rt2860_updateslot(ic->ic_ifp);
+			rt2860_enable_mrr(sc);
+			rt2860_set_txpreamble(sc);
+			rt2860_set_basicrates(sc);
+			rt2860_set_bssid(sc, ic->ic_bss->ni_bssid);
+		}
+
+#ifndef IEEE80211_STA_ONLY
+		if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
+		    ic->ic_opmode == IEEE80211_M_IBSS)
+			(void)rt2860_setup_beacon(sc);
+#endif
+
+		if (ic->ic_opmode == IEEE80211_M_STA) {
+			/* fake a join to init the tx rate */
+			rt2860_newassoc(ic->ic_bss, 1);
+		}
+
+		if (ic->ic_opmode != IEEE80211_M_MONITOR) {
+			rt2860_enable_tsf_sync(sc);
+			rt2860_set_gp_timer(sc, 500);
+		}
+
+		/* turn link LED on */
+		rt2860_set_leds(sc, RT2860_LED_RADIO |
+		    (IEEE80211_IS_CHAN_2GHZ(ic->ic_bss->ni_chan) ?
+		     RT2860_LED_LINK_2GHZ : RT2860_LED_LINK_5GHZ));
+		break;
+	}
+
+	return sc->sc_newstate(ic, nstate, arg);
+}
+
+/* Read 16-bit from eFUSE ROM (>=RT3071 only.) */
+uint16_t
+rt3090_efuse_read_2(struct rt2860_softc *sc, uint16_t addr)
+{
+	uint32_t tmp;
+	uint16_t reg;
+	int ntries;
+
+	addr *= 2;
+	/*-
+	 * Read one 16-byte block into registers EFUSE_DATA[0-3]:
+	 * DATA0: F E D C
+	 * DATA1: B A 9 8
+	 * DATA2: 7 6 5 4
+	 * DATA3: 3 2 1 0
+	 */
+	tmp = RAL_READ(sc, RT3070_EFUSE_CTRL);
+	tmp &= ~(RT3070_EFSROM_MODE_MASK | RT3070_EFSROM_AIN_MASK);
+	tmp |= (addr & ~0xf) << RT3070_EFSROM_AIN_SHIFT | RT3070_EFSROM_KICK;
+	RAL_WRITE(sc, RT3070_EFUSE_CTRL, tmp);
+	for (ntries = 0; ntries < 500; ntries++) {
+		tmp = RAL_READ(sc, RT3070_EFUSE_CTRL);
+		if (!(tmp & RT3070_EFSROM_KICK))
+			break;
+		DELAY(2);
+	}
+	if (ntries == 500)
+		return 0xffff;
+
+	if ((tmp & RT3070_EFUSE_AOUT_MASK) == RT3070_EFUSE_AOUT_MASK)
+		return 0xffff;	/* address not found */
+
+	/* determine to which 32-bit register our 16-bit word belongs */
+	reg = RT3070_EFUSE_DATA3 - (addr & 0xc);
+	tmp = RAL_READ(sc, reg);
+
+	return (addr & 2) ? tmp >> 16 : tmp & 0xffff;
+}
+
+/*
+ * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46,
+ * 93C66 or 93C86).
+ */
+uint16_t
+rt2860_eeprom_read_2(struct rt2860_softc *sc, uint16_t addr)
+{
+	uint32_t tmp;
+	uint16_t val;
+	int n;
+
+	/* clock C once before the first command */
+	RT2860_EEPROM_CTL(sc, 0);
+
+	RT2860_EEPROM_CTL(sc, RT2860_S);
+	RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_C);
+	RT2860_EEPROM_CTL(sc, RT2860_S);
+
+	/* write start bit (1) */
+	RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_D);
+	RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_D | RT2860_C);
+
+	/* write READ opcode (10) */
+	RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_D);
+	RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_D | RT2860_C);
+	RT2860_EEPROM_CTL(sc, RT2860_S);
+	RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_C);
+
+	/* write address (A5-A0 or A7-A0) */
+	n = ((RAL_READ(sc, RT2860_PCI_EECTRL) & 0x30) == 0) ? 5 : 7;
+	for (; n >= 0; n--) {
+		RT2860_EEPROM_CTL(sc, RT2860_S |
+		    (((addr >> n) & 1) << RT2860_SHIFT_D));
+		RT2860_EEPROM_CTL(sc, RT2860_S |
+		    (((addr >> n) & 1) << RT2860_SHIFT_D) | RT2860_C);
+	}
+
+	RT2860_EEPROM_CTL(sc, RT2860_S);
+
+	/* read data Q15-Q0 */
+	val = 0;
+	for (n = 15; n >= 0; n--) {
+		RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_C);
+		tmp = RAL_READ(sc, RT2860_PCI_EECTRL);
+		val |= ((tmp & RT2860_Q) >> RT2860_SHIFT_Q) << n;
+		RT2860_EEPROM_CTL(sc, RT2860_S);
+	}
+
+	RT2860_EEPROM_CTL(sc, 0);
+
+	/* clear Chip Select and clock C */
+	RT2860_EEPROM_CTL(sc, RT2860_S);
+	RT2860_EEPROM_CTL(sc, 0);
+	RT2860_EEPROM_CTL(sc, RT2860_C);
+
+	return val;
+}
+
+static __inline uint16_t
+rt2860_srom_read(struct rt2860_softc *sc, uint8_t addr)
+{
+	/* either eFUSE ROM or EEPROM */
+	return sc->sc_srom_read(sc, addr);
+}
+
+void
+rt2860_intr_coherent(struct rt2860_softc *sc)
+{
+	uint32_t tmp;
+
+	/* DMA finds data coherent event when checking the DDONE bit */
+
+	DPRINTF(("Tx/Rx Coherent interrupt\n"));
+
+	/* restart DMA engine */
+	tmp = RAL_READ(sc, RT2860_WPDMA_GLO_CFG);
+	tmp &= ~(RT2860_TX_WB_DDONE | RT2860_RX_DMA_EN | RT2860_TX_DMA_EN);
+	RAL_WRITE(sc, RT2860_WPDMA_GLO_CFG, tmp);
+
+	(void)rt2860_txrx_enable(sc);
+}
+
+void
+rt2860_drain_stats_fifo(struct rt2860_softc *sc)
+{
+	struct ifnet *ifp = &sc->sc_if;
+	struct ieee80211_amrr_node *amn;
+	uint32_t stat;
+	uint8_t wcid, mcs, pid;
+
+	/* drain Tx status FIFO (maxsize = 16) */
+	while ((stat = RAL_READ(sc, RT2860_TX_STAT_FIFO)) & RT2860_TXQ_VLD) {
+		DPRINTFN(4, ("tx stat 0x%08x\n", stat));
+
+		wcid = (stat >> RT2860_TXQ_WCID_SHIFT) & 0xff;
+
+		/* if no ACK was requested, no feedback is available */
+		if (!(stat & RT2860_TXQ_ACKREQ) || wcid == 0xff)
+			continue;
+
+		/* update per-STA AMRR stats */
+		amn = &sc->amn[wcid];
+		amn->amn_txcnt++;
+		if (stat & RT2860_TXQ_OK) {
+			/*
+			 * Check if there were retries, ie if the Tx success
+			 * rate is different from the requested rate.  Note
+			 * that it works only because we do not allow rate
+			 * fallback from OFDM to CCK.
+			 */
+			mcs = (stat >> RT2860_TXQ_MCS_SHIFT) & 0x7f;
+			pid = (stat >> RT2860_TXQ_PID_SHIFT) & 0xf;
+			if (mcs + 1 != pid)
+				amn->amn_retrycnt++;
+		} else {
+			amn->amn_retrycnt++;
+			ifp->if_oerrors++;
+		}
+	}
+}
+
+void
+rt2860_tx_intr(struct rt2860_softc *sc, int qid)
+{
+	struct ifnet *ifp = &sc->sc_if;
+	struct rt2860_tx_ring *ring = &sc->txq[qid];
+	uint32_t hw;
+
+	rt2860_drain_stats_fifo(sc);
+
+	hw = RAL_READ(sc, RT2860_TX_DTX_IDX(qid));
+	while (ring->next != hw) {
+		struct rt2860_tx_data *data = ring->data[ring->next];
+
+		if (data != NULL) {
+			bus_dmamap_sync(sc->sc_dmat, data->map, 0,
+			    data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
+			bus_dmamap_unload(sc->sc_dmat, data->map);
+			m_freem(data->m);
+			data->m= NULL;
+			ieee80211_free_node(data->ni);
+			data->ni = NULL;
+
+			SLIST_INSERT_HEAD(&sc->data_pool, data, next);
+			ring->data[ring->next] = NULL;
+
+			ifp->if_opackets++;
+		}
+		ring->queued--;
+		ring->next = (ring->next + 1) % RT2860_TX_RING_COUNT;
+	}
+
+	sc->sc_tx_timer = 0;
+	if (ring->queued < RT2860_TX_RING_COUNT)
+		sc->qfullmsk &= ~(1 << qid);
+	rt2860_start(ifp);
+}
+
+/*
+ * Return the Rx chain with the highest RSSI for a given frame.
+ */
+static __inline uint8_t
+rt2860_maxrssi_chain(struct rt2860_softc *sc, const struct rt2860_rxwi *rxwi)
+{
+	uint8_t rxchain = 0;
+
+	if (sc->nrxchains > 1) {
+		if (rxwi->rssi[1] > rxwi->rssi[rxchain])
+			rxchain = 1;
+		if (sc->nrxchains > 2)
+			if (rxwi->rssi[2] > rxwi->rssi[rxchain])
+				rxchain = 2;
+	}
+	return rxchain;
+}
+
+void
+rt2860_rx_intr(struct rt2860_softc *sc)
+{
+	struct ieee80211com *ic = &sc->sc_ic;
+	struct ifnet *ifp = &sc->sc_if;
+	struct ieee80211_frame *wh;
+	struct ieee80211_node *ni;
+	struct mbuf *m, *m1;
+	uint32_t hw;
+	uint8_t ant, rssi;
+	int error;
+	struct rt2860_rx_radiotap_header *tap;
+	uint16_t phy;
+
+	hw = RAL_READ(sc, RT2860_FS_DRX_IDX) & 0xfff;
+	while (sc->rxq.cur != hw) {
+		struct rt2860_rx_data *data = &sc->rxq.data[sc->rxq.cur];
+		struct rt2860_rxd *rxd = &sc->rxq.rxd[sc->rxq.cur];
+		struct rt2860_rxwi *rxwi;
+
+		bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
+		    sc->rxq.cur * sizeof (struct rt2860_rxd),
+		    sizeof (struct rt2860_rxd), BUS_DMASYNC_POSTREAD);
+
+		if (__predict_false(!(rxd->sdl0 & htole16(RT2860_RX_DDONE)))) {
+			DPRINTF(("RXD DDONE bit not set!\n"));
+			break;	/* should not happen */
+		}
+
+		if (__predict_false(rxd->flags &
+		    htole32(RT2860_RX_CRCERR | RT2860_RX_ICVERR))) {
+			ifp->if_ierrors++;
+			goto skip;
+		}
+
+		MGET(m1, M_DONTWAIT, MT_DATA);
+		if (__predict_false(m1 == NULL)) {
+			ifp->if_ierrors++;
+			goto skip;
+		}
+		MCLGET(m1, M_DONTWAIT);
+		if (__predict_false((m1->m_flags & M_EXT) == 0)) {
+			m_freem(m1);
+			ifp->if_ierrors++;
+			goto skip;
+		}
+
+		bus_dmamap_sync(sc->sc_dmat, data->map, 0,
+		    data->map->dm_mapsize, BUS_DMASYNC_POSTREAD);
+		bus_dmamap_unload(sc->sc_dmat, data->map);
+
+		error = bus_dmamap_load(sc->sc_dmat, data->map,
+		    mtod(m1, void *), MCLBYTES, NULL,
+		    BUS_DMA_READ | BUS_DMA_NOWAIT);
+		if (__predict_false(error != 0)) {
+			m_freem(m1);
+
+			/* try to reload the old mbuf */
+			error = bus_dmamap_load(sc->sc_dmat, data->map,
+			    mtod(data->m, void *), MCLBYTES, NULL,
+			    BUS_DMA_READ | BUS_DMA_NOWAIT);
+			if (__predict_false(error != 0)) {
+				panic("%s: could not load old rx mbuf",
+				    device_xname(sc->sc_dev));
+			}
+			/* physical address may have changed */
+			rxd->sdp0 = htole32(data->map->dm_segs[0].ds_addr);
+			ifp->if_ierrors++;
+			goto skip;
+		}
+
+		/*
+		 * New mbuf successfully loaded, update Rx ring and continue
+		 * processing.
+		 */
+		m = data->m;
+		data->m = m1;
+		rxd->sdp0 = htole32(data->map->dm_segs[0].ds_addr);
+
+		rxwi = mtod(m, struct rt2860_rxwi *);
+
+		/* finalize mbuf */
+		m->m_data = (void *)(rxwi + 1);
+		m->m_pkthdr.len = m->m_len = le16toh(rxwi->len) & 0xfff;
+
+		wh = mtod(m, struct ieee80211_frame *);
+		if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
+			/* frame is decrypted by hardware */
+			wh->i_fc[1] &= ~IEEE80211_FC1_PROTECTED;
+		}
+
+		/* HW may insert 2 padding bytes after 802.11 header */
+		if (rxd->flags & htole32(RT2860_RX_L2PAD)) {
+			u_int hdrlen = ieee80211_hdrspace(ic, wh);
+			memmove(wh + 2, wh, hdrlen);
+			m->m_data += 2;
+			wh = mtod(m, struct ieee80211_frame *);
+		}
+
+		if (__predict_false(rxd->flags & htole32(RT2860_RX_MICERR))) {
+			/* report MIC failures to net80211 for TKIP */
+			ieee80211_notify_michael_failure(ic, wh, 0/* XXX */);
+			ifp->if_ierrors++;
+			goto skip;
+		}
+
+		ant = rt2860_maxrssi_chain(sc, rxwi);
+		rssi = rxwi->rssi[ant];
+
+		if (__predict_true(sc->sc_drvbpf == NULL))
+			goto skipbpf;
+
+		tap = &sc->sc_rxtap;
+		tap->wr_flags = 0;
+		tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq);
+		tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags);
+		tap->wr_antsignal = rssi;
+		tap->wr_antenna = ant;
+		tap->wr_dbm_antsignal = rt2860_rssi2dbm(sc, rssi, ant);
+		tap->wr_rate = 2;	/* in case it can't be found below */
+		phy = le16toh(rxwi->phy);
+		switch (phy & RT2860_PHY_MODE) {
+		case RT2860_PHY_CCK:
+			switch ((phy & RT2860_PHY_MCS) & ~RT2860_PHY_SHPRE) {
+			case 0:	tap->wr_rate =   2; break;
+			case 1:	tap->wr_rate =   4; break;
+			case 2:	tap->wr_rate =  11; break;
+			case 3:	tap->wr_rate =  22; break;
+			}
+			if (phy & RT2860_PHY_SHPRE)
+				tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
+			break;
+		case RT2860_PHY_OFDM:
+			switch (phy & RT2860_PHY_MCS) {
+			case 0:	tap->wr_rate =  12; break;
+			case 1:	tap->wr_rate =  18; break;
+			case 2:	tap->wr_rate =  24; break;
+			case 3:	tap->wr_rate =  36; break;
+			case 4:	tap->wr_rate =  48; break;
+			case 5:	tap->wr_rate =  72; break;
+			case 6:	tap->wr_rate =  96; break;
+			case 7:	tap->wr_rate = 108; break;
+			}
+			break;
+		}
+		bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m);
+skipbpf:
+		/* grab a reference to the source node */
+		ni = ieee80211_find_rxnode(ic,
+		    (struct ieee80211_frame_min *)wh);
+
+		/* send the frame to the 802.11 layer */
+		ieee80211_input(ic, m, ni, rssi, 0);
+
+		/* node is no longer needed */
+		ieee80211_free_node(ni);
+
+skip:		rxd->sdl0 &= ~htole16(RT2860_RX_DDONE);
+
+		bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
+		    sc->rxq.cur * sizeof (struct rt2860_rxd),
+		    sizeof (struct rt2860_rxd), BUS_DMASYNC_PREWRITE);
+
+		sc->rxq.cur = (sc->rxq.cur + 1) % RT2860_RX_RING_COUNT;
+	}
+
+	/* tell HW what we have processed */
+	RAL_WRITE(sc, RT2860_RX_CALC_IDX,
+	    (sc->rxq.cur - 1) % RT2860_RX_RING_COUNT);
+}
+
+void
+rt2860_tbtt_intr(struct rt2860_softc *sc)
+{
+	struct ieee80211com *ic = &sc->sc_ic;
+
+#ifndef IEEE80211_STA_ONLY
+	if (ic->ic_opmode == IEEE80211_M_HOSTAP) {
+		/* one less beacon until next DTIM */
+		if (ic->ic_dtim_count == 0)
+			ic->ic_dtim_count = ic->ic_dtim_period - 1;
+		else
+			ic->ic_dtim_count--;
+
+		/* update dynamic parts of beacon */
+		rt2860_setup_beacon(sc);
+
+#if 0
+		/* flush buffered multicast frames */
+		if (ic->ic_dtim_count == 0)
+			ieee80211_notify_dtim(ic);
+#endif
+	}
+#endif
+	/* check if protection mode has changed */
+	if ((sc->sc_ic_flags ^ ic->ic_flags) & IEEE80211_F_USEPROT) {
+		rt2860_updateprot(ic);
+		sc->sc_ic_flags = ic->ic_flags;
+	}
+}
+
+void
+rt2860_gp_intr(struct rt2860_softc *sc)
+{
+	struct ieee80211com *ic = &sc->sc_ic;
+
+	DPRINTFN(2, ("GP timeout state=%d\n", ic->ic_state));
+
+	if (ic->ic_state == IEEE80211_S_SCAN)
+		ieee80211_next_scan(ic);
+	else if (ic->ic_state == IEEE80211_S_RUN)
+		rt2860_updatestats(sc);
+}
+
+int
+rt2860_intr(void *arg)
+{
+	struct rt2860_softc *sc = arg;
+	uint32_t r;
+
+	r = RAL_READ(sc, RT2860_INT_STATUS);
+	if (__predict_false(r == 0xffffffff))
+		return 0;	/* device likely went away */
+	if (r == 0)
+		return 0;	/* not for us */
+
+	/* acknowledge interrupts */
+	RAL_WRITE(sc, RT2860_INT_STATUS, r);
+
+	if (r & RT2860_TX_RX_COHERENT)
+		rt2860_intr_coherent(sc);
+
+	if (r & RT2860_MAC_INT_2)	/* TX status */
+		rt2860_drain_stats_fifo(sc);
+
+	if (r & RT2860_TX_DONE_INT5)
+		rt2860_tx_intr(sc, 5);
+
+	if (r & RT2860_RX_DONE_INT)
+		rt2860_rx_intr(sc);
+
+	if (r & RT2860_TX_DONE_INT4)
+		rt2860_tx_intr(sc, 4);
+
+	if (r & RT2860_TX_DONE_INT3)
+		rt2860_tx_intr(sc, 3);
+
+	if (r & RT2860_TX_DONE_INT2)
+		rt2860_tx_intr(sc, 2);
+
+	if (r & RT2860_TX_DONE_INT1)
+		rt2860_tx_intr(sc, 1);
+
+	if (r & RT2860_TX_DONE_INT0)
+		rt2860_tx_intr(sc, 0);
+
+	if (r & RT2860_MAC_INT_0)	/* TBTT */
+		rt2860_tbtt_intr(sc);
+
+	if (r & RT2860_MAC_INT_3)	/* Auto wakeup */
+		/* TBD wakeup */{};
+
+	if (r & RT2860_MAC_INT_4)	/* GP timer */
+		rt2860_gp_intr(sc);
+
+	return 1;
+}
+
+int
+rt2860_tx(struct rt2860_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
+{
+	struct ieee80211com *ic = &sc->sc_ic;
+	struct rt2860_node *rn = (void *)ni;
+	struct rt2860_tx_ring *ring;
+	struct rt2860_tx_data *data;
+	struct rt2860_txd *txd;
+	struct rt2860_txwi *txwi;
+	struct ieee80211_frame *wh;
+	struct mbuf *m1;
+	bus_dma_segment_t *seg;
+	u_int hdrlen;
+	uint16_t qos, dur;
+	uint8_t type, qsel, mcs, pid, tid, qid;
+	int nsegs, ntxds, hasqos, ridx, ctl_ridx, error;
+
+	/* the data pool contains at least one element, pick the first */
+	data = SLIST_FIRST(&sc->data_pool);
+
+	wh = mtod(m, struct ieee80211_frame *);
+	hdrlen = ieee80211_hdrspace(ic, wh);
+	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
+
+	if ((hasqos = ieee80211_has_qos(wh))) {
+		qos = ieee80211_get_qos(wh);
+		tid = qos & IEEE80211_QOS_TID;
+		qid = TID_TO_WME_AC(tid);
+	} else {
+		qos = 0;
+		tid = 0;
+		qid = (type == IEEE80211_FC0_TYPE_MGT) ?
+		    sc->mgtqid : WME_AC_BE;
+	}
+	ring = &sc->txq[qid];
+
+	/* pickup a rate index */
+	if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
+	    type != IEEE80211_FC0_TYPE_DATA) {
+		ridx = (ic->ic_curmode == IEEE80211_MODE_11A) ?
+		    RT2860_RIDX_OFDM6 : RT2860_RIDX_CCK1;
+		ctl_ridx = rt2860_rates[ridx].ctl_ridx;
+	} else if (ic->ic_fixed_rate != -1) {
+		ridx = sc->fixed_ridx;
+		ctl_ridx = rt2860_rates[ridx].ctl_ridx;
+	} else {
+		ridx = rn->ridx[ni->ni_txrate];
+		ctl_ridx = rn->ctl_ridx[ni->ni_txrate];
+	}
+
+	/* get MCS code from rate index */
+	mcs = rt2860_rates[ridx].mcs;
+
+	/* setup TX Wireless Information */
+	txwi = data->txwi;
+	txwi->flags = 0;
+	/* let HW generate seq numbers for non-QoS frames */
+	txwi->xflags = hasqos ? 0 : RT2860_TX_NSEQ;
+	txwi->wcid = (type == IEEE80211_FC0_TYPE_DATA) ? rn->wcid : 0xff;
+	txwi->len = htole16(m->m_pkthdr.len);
+	if (rt2860_rates[ridx].phy == IEEE80211_T_DS) {
+		txwi->phy = htole16(RT2860_PHY_CCK);
+		if (ridx != RT2860_RIDX_CCK1 &&
+		    (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
+			mcs |= RT2860_PHY_SHPRE;
+	} else
+		txwi->phy = htole16(RT2860_PHY_OFDM);
+	txwi->phy |= htole16(mcs);
+
+	/*
+	 * We store the MCS code into the driver-private PacketID field.
+	 * The PacketID is latched into TX_STAT_FIFO when Tx completes so
+	 * that we know at which initial rate the frame was transmitted.
+	 * We add 1 to the MCS code because setting the PacketID field to
+	 * 0 means that we don't want feedback in TX_STAT_FIFO.
+	 */
+	pid = (mcs + 1) & 0xf;
+	txwi->len |= htole16(pid << RT2860_TX_PID_SHIFT);
+
+	/* check if RTS/CTS or CTS-to-self protection is required */
+	if (!IEEE80211_IS_MULTICAST(wh->i_addr1) &&
+	    (m->m_pkthdr.len + IEEE80211_CRC_LEN > ic->ic_rtsthreshold ||
+	     ((ic->ic_flags & IEEE80211_F_USEPROT) &&
+	      rt2860_rates[ridx].phy == IEEE80211_T_OFDM)))
+		txwi->txop = RT2860_TX_TXOP_HT;
+	else
+		txwi->txop = RT2860_TX_TXOP_BACKOFF;
+
+	if (!IEEE80211_IS_MULTICAST(wh->i_addr1) &&
+	    (!hasqos || (qos & IEEE80211_QOS_ACKPOLICY) !=
+	     IEEE80211_QOS_ACKPOLICY_NOACK)) {
+		txwi->xflags |= RT2860_TX_ACK;
+
+		if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
+			dur = rt2860_rates[ctl_ridx].sp_ack_dur;
+		else
+			dur = rt2860_rates[ctl_ridx].lp_ack_dur;
+		*(uint16_t *)wh->i_dur = htole16(dur);
+	}
+#ifndef IEEE80211_STA_ONLY
+	/* ask MAC to insert timestamp into probe responses */
+	if ((wh->i_fc[0] &
+	     (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
+	     (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
+	    /* NOTE: beacons do not pass through tx_data() */
+		txwi->flags |= RT2860_TX_TS;
+#endif
+
+#if NBPFILTER > 0
+	if (__predict_false(sc->sc_drvbpf != NULL)) {
+		struct rt2860_tx_radiotap_header *tap = &sc->sc_txtap;
+		struct mbuf mb;
+
+		tap->wt_flags = 0;
+		tap->wt_rate = rt2860_rates[ridx].rate;
+		tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
+		tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags);
+		tap->wt_hwqueue = qid;
+		if (mcs & RT2860_PHY_SHPRE)
+			tap->wt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
+
+		mb.m_data = (void *)tap;
+		mb.m_len = sc->sc_txtap_len;
+		mb.m_next = m;
+		mb.m_nextpkt = NULL;
+		mb.m_type = 0;
+		mb.m_flags = 0;
+		bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT);
+	}
+#endif
+
+	/* copy and trim 802.11 header */
+	memcpy(txwi + 1, wh, hdrlen);
+	m_adj(m, hdrlen);
+
+	error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m,
+	    BUS_DMA_NOWAIT);
+	if (__predict_false(error != 0 && error != EFBIG)) {
+		aprint_error_dev(sc->sc_dev, "can't map mbuf (error %d)\n",
+		    error);
+		m_freem(m);
+		return error;
+	}
+	if (__predict_true(error == 0)) {
+		/* determine how many TXDs are required */
+		ntxds = 1 + (data->map->dm_nsegs / 2);
+
+		if (ring->queued + ntxds >= RT2860_TX_RING_COUNT) {
+			/* not enough free TXDs, force mbuf defrag */
+			bus_dmamap_unload(sc->sc_dmat, data->map);
+			error = EFBIG;
+		}
+	}
+	if (__predict_false(error != 0)) {
+		/* too many fragments, linearize */
+		MGETHDR(m1, M_DONTWAIT, MT_DATA);
+		if (m1 == NULL) {
+			m_freem(m);
+			return ENOBUFS;
+		}
+		if (m->m_pkthdr.len > MHLEN) {
+			MCLGET(m1, M_DONTWAIT);
+			if (!(m1->m_flags & M_EXT)) {
+				m_freem(m);
+				m_freem(m1);
+				return ENOBUFS;
+			}
+		}
+		m_copydata(m, 0, m->m_pkthdr.len, mtod(m1, void *));
+		m1->m_pkthdr.len = m1->m_len = m->m_pkthdr.len;
+		m_freem(m);
+		m = m1;
+
+		error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m,
+		    BUS_DMA_NOWAIT);
+		if (__predict_false(error != 0)) {
+			aprint_error_dev(sc->sc_dev,
+			    "can't map mbuf (error %d)\n", error);
+			m_freem(m);
+			return error;
+		}
+
+		/* determine how many TXDs are now required */
+		ntxds = 1 + (data->map->dm_nsegs / 2);
+
+		if (ring->queued + ntxds >= RT2860_TX_RING_COUNT) {
+			/* this is a hopeless case, drop the mbuf! */
+			bus_dmamap_unload(sc->sc_dmat, data->map);
+			m_freem(m);
+			return ENOBUFS;
+		}
+	}
+
+	qsel = (qid < WME_NUM_AC) ? RT2860_TX_QSEL_EDCA : RT2860_TX_QSEL_MGMT;
+
+	/* first segment is TXWI + 802.11 header */
+	txd = &ring->txd[ring->cur];
+	txd->sdp0 = htole32(data->paddr);
+	txd->sdl0 = htole16(sizeof (struct rt2860_txwi) + hdrlen);
+	txd->flags = qsel;
+
+	/* setup payload segments */
+	seg = data->map->dm_segs;
+	for (nsegs = data->map->dm_nsegs; nsegs >= 2; nsegs -= 2) {
+		txd->sdp1 = htole32(seg->ds_addr);
+		txd->sdl1 = htole16(seg->ds_len);
+		seg++;
+		ring->cur = (ring->cur + 1) % RT2860_TX_RING_COUNT;
+		/* grab a new Tx descriptor */
+		txd = &ring->txd[ring->cur];
+		txd->sdp0 = htole32(seg->ds_addr);
+		txd->sdl0 = htole16(seg->ds_len);
+		txd->flags = qsel;
+		seg++;
+	}
+	/* finalize last segment */
+	if (nsegs > 0) {
+		txd->sdp1 = htole32(seg->ds_addr);
+		txd->sdl1 = htole16(seg->ds_len | RT2860_TX_LS1);
+	} else {
+		txd->sdl0 |= htole16(RT2860_TX_LS0);
+		txd->sdl1 = 0;
+	}
+
+	/* remove from the free pool and link it into the SW Tx slot */
+	SLIST_REMOVE_HEAD(&sc->data_pool, next);
+	data->m = m;
+	data->ni = ni;
+	ring->data[ring->cur] = data;
+
+	bus_dmamap_sync(sc->sc_dmat, sc->txwi_map,
+	    (uintptr_t)txwi - (uintptr_t)sc->txwi_vaddr, RT2860_TXWI_DMASZ,
+	    BUS_DMASYNC_PREWRITE);
+	bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
+	    BUS_DMASYNC_PREWRITE);
+	bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
+	    BUS_DMASYNC_PREWRITE);
+
+	DPRINTFN(4, ("sending frame qid=%d wcid=%d nsegs=%d ridx=%d\n",
+	    qid, txwi->wcid, data->map->dm_nsegs, ridx));
+
+	ring->cur = (ring->cur + 1) % RT2860_TX_RING_COUNT;
+	ring->queued += ntxds;
+	if (ring->queued >= RT2860_TX_RING_COUNT)
+		sc->qfullmsk |= 1 << qid;
+
+	/* kick Tx */
+	RAL_WRITE(sc, RT2860_TX_CTX_IDX(qid), ring->cur);
+
+	return 0;
+}
+
+void
+rt2860_start(struct ifnet *ifp)
+{
+	struct rt2860_softc *sc = ifp->if_softc;
+	struct ieee80211com *ic = &sc->sc_ic;
+	struct ether_header *eh;
+	struct ieee80211_node *ni;
+	struct mbuf *m;
+
+	if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
+		return;
+
+	for (;;) {
+		if (SLIST_EMPTY(&sc->data_pool) || sc->qfullmsk != 0) {
+			ifp->if_flags |= IFF_OACTIVE;
+			break;
+		}
+		/* send pending management frames first */
+		IF_DEQUEUE(&ic->ic_mgtq, m);
+		if (m != NULL) {
+			ni = (void *)m->m_pkthdr.rcvif;
+			m->m_pkthdr.rcvif = NULL;
+			goto sendit;
+		}
+		if (ic->ic_state != IEEE80211_S_RUN)
+			break;
+
+		/* encapsulate and send data frames */
+		IFQ_DEQUEUE(&ifp->if_snd, m);
+		if (m == NULL)
+			break;
+		if (m->m_len < (int)sizeof(*eh) &&
+		    (m = m_pullup(m, sizeof(*eh))) == NULL) {
+			ifp->if_oerrors++;
+			continue;
+		}
+
+		eh = mtod(m, struct ether_header *);
+		ni = ieee80211_find_txnode(ic, eh->ether_dhost);
+		if (ni == NULL) {
+			m_freem(m);
+			ifp->if_oerrors++;
+			continue;
+		}
+
+		bpf_mtap(ifp, m);
+
+		if ((m = ieee80211_encap(ic, m, ni)) == NULL) {
+			ieee80211_free_node(ni);
+			ifp->if_oerrors++;
+			continue;
+		}
+sendit:
+		bpf_mtap3(ic->ic_rawbpf, m);
+
+		if (rt2860_tx(sc, m, ni) != 0) {
+			ieee80211_free_node(ni);
+			ifp->if_oerrors++;
+			continue;
+		}
+
+		sc->sc_tx_timer = 5;
+		ifp->if_timer = 1;
+	}
+}
+
+void
+rt2860_watchdog(struct ifnet *ifp)
+{
+	struct rt2860_softc *sc = ifp->if_softc;
+	struct ieee80211com *ic = &sc->sc_ic;
+
+	ifp->if_timer = 0;
+
+	if (sc->sc_tx_timer > 0) {
+		if (--sc->sc_tx_timer == 0) {
+			aprint_error_dev(sc->sc_dev, "device timeout\n");
+			rt2860_stop(ifp, 0);
+			rt2860_init(ifp);
+			ifp->if_oerrors++;
+			return;
+		}
+		ifp->if_timer = 1;
+	}
+
+	ieee80211_watchdog(ic);
+}
+
+int
+rt2860_ioctl(struct ifnet *ifp, u_long cmd, void *data)
+{
+	struct rt2860_softc *sc = ifp->if_softc;
+	struct ieee80211com *ic = &sc->sc_ic;
+	int s, error = 0;
+
+	s = splnet();
+
+	switch (cmd) {
+	case SIOCSIFADDR:
+		ifp->if_flags |= IFF_UP;
+		/* FALLTHROUGH */
+	case SIOCSIFFLAGS:
+		if (ifp->if_flags & IFF_UP) {
+			if (!(ifp->if_flags & IFF_RUNNING))
+				rt2860_init(ifp);
+		} else {
+			if (ifp->if_flags & IFF_RUNNING)
+				rt2860_stop(ifp, 1);
+		}
+		break;
+
+	case SIOCADDMULTI:
+	case SIOCDELMULTI:
+		if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) {
+			/* setup multicast filter, etc */
+			error = 0;
+		}
+		break;
+
+	default:
+		error = ieee80211_ioctl(ic, cmd, data);
+	}
+
+	if (error == ENETRESET) {
+		if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
+		    (IFF_UP | IFF_RUNNING)) {
+			rt2860_stop(ifp, 0);
+			rt2860_init(ifp);
+		}
+		error = 0;
+	}
+
+	splx(s);
+
+	return error;
+}
+
+/*
+ * Reading and writing from/to the BBP is different from RT2560 and RT2661.
+ * We access the BBP through the 8051 microcontroller unit which means that
+ * the microcode must be loaded first.
+ */
+void
+rt2860_mcu_bbp_write(struct rt2860_softc *sc, uint8_t reg, uint8_t val)
+{
+	int ntries;
+
+	for (ntries = 0; ntries < 100; ntries++) {
+		if (!(RAL_READ(sc, RT2860_H2M_BBPAGENT) & RT2860_BBP_CSR_KICK))
+			break;
+		DELAY(1);
+	}
+	if (ntries == 100) {
+		aprint_error_dev(sc->sc_dev,
+		    "could not write to BBP through MCU\n");
+		return;
+	}
+
+	RAL_WRITE(sc, RT2860_H2M_BBPAGENT, RT2860_BBP_RW_PARALLEL |
+	    RT2860_BBP_CSR_KICK | reg << 8 | val);
+	RAL_BARRIER_WRITE(sc);
+
+	rt2860_mcu_cmd(sc, RT2860_MCU_CMD_BBP, 0, 0);
+	DELAY(1000);
+}
+
+uint8_t
+rt2860_mcu_bbp_read(struct rt2860_softc *sc, uint8_t reg)
+{
+	uint32_t val;
+	int ntries;
+
+	for (ntries = 0; ntries < 100; ntries++) {
+		if (!(RAL_READ(sc, RT2860_H2M_BBPAGENT) & RT2860_BBP_CSR_KICK))
+			break;
+		DELAY(1);
+	}
+	if (ntries == 100) {
+		aprint_error_dev(sc->sc_dev,
+		    "could not read from BBP through MCU\n");
+		return 0;
+	}
+
+	RAL_WRITE(sc, RT2860_H2M_BBPAGENT, RT2860_BBP_RW_PARALLEL |
+	    RT2860_BBP_CSR_KICK | RT2860_BBP_CSR_READ | reg << 8);
+	RAL_BARRIER_WRITE(sc);
+
+	rt2860_mcu_cmd(sc, RT2860_MCU_CMD_BBP, 0, 0);
+	DELAY(1000);
+
+	for (ntries = 0; ntries < 100; ntries++) {
+		val = RAL_READ(sc, RT2860_H2M_BBPAGENT);
+		if (!(val & RT2860_BBP_CSR_KICK))
+			return val & 0xff;
+		DELAY(1);
+	}
+	aprint_error_dev(sc->sc_dev, "could not read from BBP through MCU\n");
+
+	return 0;
+}
+
+/*
+ * Write to one of the 4 programmable 24-bit RF registers.
+ */
+void
+rt2860_rf_write(struct rt2860_softc *sc, uint8_t reg, uint32_t val)
+{
+	uint32_t tmp;
+	int ntries;
+
+	for (ntries = 0; ntries < 100; ntries++) {
+		if (!(RAL_READ(sc, RT2860_RF_CSR_CFG0) & RT2860_RF_REG_CTRL))
+			break;
+		DELAY(1);
+	}
+	if (ntries == 100) {
+		aprint_error_dev(sc->sc_dev, "could not write to RF\n");
+		return;
+	}
+
+	/* RF registers are 24-bit on the RT2860 */
+	tmp = RT2860_RF_REG_CTRL | 24 << RT2860_RF_REG_WIDTH_SHIFT |
+	    (val & 0x3fffff) << 2 | (reg & 3);
+	RAL_WRITE(sc, RT2860_RF_CSR_CFG0, tmp);
+}
+
+uint8_t
+rt3090_rf_read(struct rt2860_softc *sc, uint8_t reg)
+{
+	uint32_t tmp;
+	int ntries;
+
+	for (ntries = 0; ntries < 100; ntries++) {
+		if (!(RAL_READ(sc, RT3070_RF_CSR_CFG) & RT3070_RF_KICK))
+			break;
+		DELAY(1);
+	}
+	if (ntries == 100) {
+		aprint_error_dev(sc->sc_dev, "could not read RF register\n");
+		return 0xff;
+	}
+	tmp = RT3070_RF_KICK | reg << 8;
+	RAL_WRITE(sc, RT3070_RF_CSR_CFG, tmp);
+
+	for (ntries = 0; ntries < 100; ntries++) {
+		tmp = RAL_READ(sc, RT3070_RF_CSR_CFG);
+		if (!(tmp & RT3070_RF_KICK))
+			break;
+		DELAY(1);
+	}
+	if (ntries == 100) {
+		aprint_error_dev(sc->sc_dev, "could not read RF register\n");
+		return 0xff;
+	}
+	return tmp & 0xff;
+}
+
+void
+rt3090_rf_write(struct rt2860_softc *sc, uint8_t reg, uint8_t val)
+{
+	uint32_t tmp;
+	int ntries;
+
+	for (ntries = 0; ntries < 10; ntries++) {
+		if (!(RAL_READ(sc, RT3070_RF_CSR_CFG) & RT3070_RF_KICK))
+			break;
+		DELAY(10);
+	}
+	if (ntries == 10) {
+		aprint_error_dev(sc->sc_dev, "could not write to RF\n");
+		return;
+	}
+
+	tmp = RT3070_RF_WRITE | RT3070_RF_KICK | reg << 8 | val;
+	RAL_WRITE(sc, RT3070_RF_CSR_CFG, tmp);
+}
+
+/*
+ * Send a command to the 8051 microcontroller unit.
+ */
+int
+rt2860_mcu_cmd(struct rt2860_softc *sc, uint8_t cmd, uint16_t arg, int wait)
+{
+	int slot, ntries;
+	uint32_t tmp;
+	uint8_t cid;
+
+	for (ntries = 0; ntries < 100; ntries++) {
+		if (!(RAL_READ(sc, RT2860_H2M_MAILBOX) & RT2860_H2M_BUSY))
+			break;
+		DELAY(2);
+	}
+	if (ntries == 100)
+		return EIO;
+
+	cid = wait ? cmd : RT2860_TOKEN_NO_INTR;
+	RAL_WRITE(sc, RT2860_H2M_MAILBOX, RT2860_H2M_BUSY | cid << 16 | arg);
+	RAL_BARRIER_WRITE(sc);
+	RAL_WRITE(sc, RT2860_HOST_CMD, cmd);
+
+	if (!wait)
+		return 0;
+	/* wait for the command to complete */
+	for (ntries = 0; ntries < 200; ntries++) {
+		tmp = RAL_READ(sc, RT2860_H2M_MAILBOX_CID);
+		/* find the command slot */
+		for (slot = 0; slot < 4; slot++, tmp >>= 8)
+			if ((tmp & 0xff) == cid)
+				break;
+		if (slot < 4)
+			break;
+		DELAY(100);
+	}
+	if (ntries == 200) {
+		/* clear command and status */
+		RAL_WRITE(sc, RT2860_H2M_MAILBOX_STATUS, 0xffffffff);
+		RAL_WRITE(sc, RT2860_H2M_MAILBOX_CID, 0xffffffff);
+		return ETIMEDOUT;
+	}
+	/* get command status (1 means success) */
+	tmp = RAL_READ(sc, RT2860_H2M_MAILBOX_STATUS);
+	tmp = (tmp >> (slot * 8)) & 0xff;
+	DPRINTF(("MCU command=0x%02x slot=%d status=0x%02x\n",
+	    cmd, slot, tmp));
+	/* clear command and status */
+	RAL_WRITE(sc, RT2860_H2M_MAILBOX_STATUS, 0xffffffff);
+	RAL_WRITE(sc, RT2860_H2M_MAILBOX_CID, 0xffffffff);
+	return (tmp == 1) ? 0 : EIO;
+}
+
+void
+rt2860_enable_mrr(struct rt2860_softc *sc)
+{
+#define CCK(mcs)	(mcs)
+#define OFDM(mcs)	(1 << 3 | (mcs))
+	RAL_WRITE(sc, RT2860_LG_FBK_CFG0,
+	    OFDM(6) << 28 |	/* 54->48 */
+	    OFDM(5) << 24 |	/* 48->36 */
+	    OFDM(4) << 20 |	/* 36->24 */
+	    OFDM(3) << 16 |	/* 24->18 */
+	    OFDM(2) << 12 |	/* 18->12 */
+	    OFDM(1) <<  8 |	/* 12-> 9 */
+	    OFDM(0) <<  4 |	/*  9-> 6 */
+	    OFDM(0));		/*  6-> 6 */
+
+	RAL_WRITE(sc, RT2860_LG_FBK_CFG1,
+	    CCK(2) << 12 |	/* 11->5.5 */
+	    CCK(1) <<  8 |	/* 5.5-> 2 */
+	    CCK(0) <<  4 |	/*   2-> 1 */
+	    CCK(0));		/*   1-> 1 */
+#undef OFDM
+#undef CCK
+}
+
+void
+rt2860_set_txpreamble(struct rt2860_softc *sc)
+{
+	uint32_t tmp;
+
+	tmp = RAL_READ(sc, RT2860_AUTO_RSP_CFG);
+	tmp &= ~RT2860_CCK_SHORT_EN;
+	if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE)
+		tmp |= RT2860_CCK_SHORT_EN;
+	RAL_WRITE(sc, RT2860_AUTO_RSP_CFG, tmp);
+}
+
+void
+rt2860_set_basicrates(struct rt2860_softc *sc)
+{
+	struct ieee80211com *ic = &sc->sc_ic;
+
+	/* set basic rates mask */
+	if (ic->ic_curmode == IEEE80211_MODE_11B)
+		RAL_WRITE(sc, RT2860_LEGACY_BASIC_RATE, 0x003);
+	else if (ic->ic_curmode == IEEE80211_MODE_11A)
+		RAL_WRITE(sc, RT2860_LEGACY_BASIC_RATE, 0x150);
+	else	/* 11g */
+		RAL_WRITE(sc, RT2860_LEGACY_BASIC_RATE, 0x15f);
+}
+
+void
+rt2860_select_chan_group(struct rt2860_softc *sc, int group)
+{
+	uint32_t tmp;
+	uint8_t agc;
+
+	rt2860_mcu_bbp_write(sc, 62, 0x37 - sc->lna[group]);
+	rt2860_mcu_bbp_write(sc, 63, 0x37 - sc->lna[group]);
+	rt2860_mcu_bbp_write(sc, 64, 0x37 - sc->lna[group]);
+	rt2860_mcu_bbp_write(sc, 86, 0x00);
+
+	if (group == 0) {
+		if (sc->ext_2ghz_lna) {
+			rt2860_mcu_bbp_write(sc, 82, 0x62);
+			rt2860_mcu_bbp_write(sc, 75, 0x46);
+		} else {
+			rt2860_mcu_bbp_write(sc, 82, 0x84);
+			rt2860_mcu_bbp_write(sc, 75, 0x50);
+		}
+	} else {
+		if (sc->mac_ver == 0x3572)
+			rt2860_mcu_bbp_write(sc, 82, 0x94);
+		else
+			rt2860_mcu_bbp_write(sc, 82, 0xf2);
+
+		if (sc->ext_5ghz_lna)
+			rt2860_mcu_bbp_write(sc, 75, 0x46);
+		else
+			rt2860_mcu_bbp_write(sc, 75, 0x50);
+	}
+
+	tmp = RAL_READ(sc, RT2860_TX_BAND_CFG);
+	tmp &= ~(RT2860_5G_BAND_SEL_N | RT2860_5G_BAND_SEL_P);
+	tmp |= (group == 0) ? RT2860_5G_BAND_SEL_N : RT2860_5G_BAND_SEL_P;
+	RAL_WRITE(sc, RT2860_TX_BAND_CFG, tmp);
+
+	/* enable appropriate Power Amplifiers and Low Noise Amplifiers */
+	tmp = RT2860_RFTR_EN | RT2860_TRSW_EN | RT2860_LNA_PE0_EN;
+	if (sc->nrxchains > 1)
+		tmp |= RT2860_LNA_PE1_EN;
+	if (sc->mac_ver == 0x3593 && sc->nrxchains > 2)
+		tmp |= RT3593_LNA_PE2_EN;
+	if (group == 0) {	/* 2GHz */
+		tmp |= RT2860_PA_PE_G0_EN;
+		if (sc->ntxchains > 1)
+			tmp |= RT2860_PA_PE_G1_EN;
+		if (sc->mac_ver == 0x3593 && sc->ntxchains > 2)
+			tmp |= RT3593_PA_PE_G2_EN;
+	} else {		/* 5GHz */
+		tmp |= RT2860_PA_PE_A0_EN;
+		if (sc->ntxchains > 1)
+			tmp |= RT2860_PA_PE_A1_EN;
+		if (sc->mac_ver == 0x3593 && sc->ntxchains > 2)
+			tmp |= RT3593_PA_PE_A2_EN;
+	}
+	if (sc->mac_ver == 0x3572) {
+		rt3090_rf_write(sc, 8, 0x00);
+		RAL_WRITE(sc, RT2860_TX_PIN_CFG, tmp);
+		rt3090_rf_write(sc, 8, 0x80);
+	} else
+		RAL_WRITE(sc, RT2860_TX_PIN_CFG, tmp);
+
+	if (sc->mac_ver == 0x3593) {
+		tmp = RAL_READ(sc, RT2860_GPIO_CTRL);
+		if (sc->sc_flags & RT2860_PCIE) {
+			tmp &= ~0x01010000;
+			if (group == 0)
+				tmp |= 0x00010000;
+		} else {
+			tmp &= ~0x00008080;
+			if (group == 0)
+				tmp |= 0x00000080;
+		}
+		tmp = (tmp & ~0x00001000) | 0x00000010;
+		RAL_WRITE(sc, RT2860_GPIO_CTRL, tmp);
+	}
+
+	/* set initial AGC value */
+	if (group == 0) {	/* 2GHz band */
+		if (sc->mac_ver >= 0x3071)
+			agc = 0x1c + sc->lna[0] * 2;
+		else
+			agc = 0x2e + sc->lna[0];
+	} else {		/* 5GHz band */
+		if (sc->mac_ver == 0x3572)
+			agc = 0x22 + (sc->lna[group] * 5) / 3;
+		else
+			agc = 0x32 + (sc->lna[group] * 5) / 3;
+	}
+	rt2860_mcu_bbp_write(sc, 66, agc);
+
+	DELAY(1000);
+}
+
+void
+rt2860_set_chan(struct rt2860_softc *sc, u_int chan)
+{
+	const struct rfprog *rfprog = rt2860_rf2850;
+	uint32_t r2, r3, r4;
+	int8_t txpow1, txpow2;
+	u_int i;
+
+	/* find the settings for this channel (we know it exists) */
+	for (i = 0; rfprog[i].chan != chan; i++);
+
+	r2 = rfprog[i].r2;
+	if (sc->ntxchains == 1)
+		r2 |= 1 << 12;		/* 1T: disable Tx chain 2 */
+	if (sc->nrxchains == 1)
+		r2 |= 1 << 15 | 1 << 4;	/* 1R: disable Rx chains 2 & 3 */
+	else if (sc->nrxchains == 2)
+		r2 |= 1 << 4;		/* 2R: disable Rx chain 3 */
+
+	/* use Tx power values from EEPROM */
+	txpow1 = sc->txpow1[i];
+	txpow2 = sc->txpow2[i];
+	if (chan > 14) {
+		if (txpow1 >= 0)
+			txpow1 = txpow1 << 1 | 1;
+		else
+			txpow1 = (7 + txpow1) << 1;
+		if (txpow2 >= 0)
+			txpow2 = txpow2 << 1 | 1;
+		else
+			txpow2 = (7 + txpow2) << 1;
+	}
+	r3 = rfprog[i].r3 | txpow1 << 7;
+	r4 = rfprog[i].r4 | sc->freq << 13 | txpow2 << 4;
+
+	rt2860_rf_write(sc, RT2860_RF1, rfprog[i].r1);
+	rt2860_rf_write(sc, RT2860_RF2, r2);
+	rt2860_rf_write(sc, RT2860_RF3, r3);
+	rt2860_rf_write(sc, RT2860_RF4, r4);
+
+	DELAY(200);
+
+	rt2860_rf_write(sc, RT2860_RF1, rfprog[i].r1);
+	rt2860_rf_write(sc, RT2860_RF2, r2);
+	rt2860_rf_write(sc, RT2860_RF3, r3 | 1);
+	rt2860_rf_write(sc, RT2860_RF4, r4);
+
+	DELAY(200);
+
+	rt2860_rf_write(sc, RT2860_RF1, rfprog[i].r1);
+	rt2860_rf_write(sc, RT2860_RF2, r2);
+	rt2860_rf_write(sc, RT2860_RF3, r3);
+	rt2860_rf_write(sc, RT2860_RF4, r4);
+}
+
+void
+rt3090_set_chan(struct rt2860_softc *sc, u_int chan)
+{
+	int8_t txpow1, txpow2;
+	uint8_t rf;
+	int i;
+
+	KASSERT(chan >= 1 && chan <= 14);	/* RT3090 is 2GHz only */
+
+	/* find the settings for this channel (we know it exists) */
+	for (i = 0; rt2860_rf2850[i].chan != chan; i++);
+
+	/* use Tx power values from EEPROM */
+	txpow1 = sc->txpow1[i];
+	txpow2 = sc->txpow2[i];
+
+	rt3090_rf_write(sc, 2, rt3090_freqs[i].n);
+	rf = rt3090_rf_read(sc, 3);
+	rf = (rf & ~0x0f) | rt3090_freqs[i].k;
+	rt3090_rf_write(sc, 3, rf);
+	rf = rt3090_rf_read(sc, 6);
+	rf = (rf & ~0x03) | rt3090_freqs[i].r;
+	rt3090_rf_write(sc, 6, rf);
+
+	/* set Tx0 power */
+	rf = rt3090_rf_read(sc, 12);
+	rf = (rf & ~0x1f) | txpow1;
+	rt3090_rf_write(sc, 12, rf);
+
+	/* set Tx1 power */
+	rf = rt3090_rf_read(sc, 13);
+	rf = (rf & ~0x1f) | txpow2;
+	rt3090_rf_write(sc, 13, rf);
+
+	rf = rt3090_rf_read(sc, 1);
+	rf &= ~0xfc;
+	if (sc->ntxchains == 1)
+		rf |= RT3070_TX1_PD | RT3070_TX2_PD;
+	else if (sc->ntxchains == 2)
+		rf |= RT3070_TX2_PD;
+	if (sc->nrxchains == 1)
+		rf |= RT3070_RX1_PD | RT3070_RX2_PD;
+	else if (sc->nrxchains == 2)
+		rf |= RT3070_RX2_PD;
+	rt3090_rf_write(sc, 1, rf);
+
+	/* set RF offset */
+	rf = rt3090_rf_read(sc, 23);
+	rf = (rf & ~0x7f) | sc->freq;
+	rt3090_rf_write(sc, 23, rf);
+
+	/* program RF filter */
+	rf = rt3090_rf_read(sc, 24);	/* Tx */
+	rf = (rf & ~0x3f) | sc->rf24_20mhz;
+	rt3090_rf_write(sc, 24, rf);
+	rf = rt3090_rf_read(sc, 31);	/* Rx */
+	rf = (rf & ~0x3f) | sc->rf24_20mhz;
+	rt3090_rf_write(sc, 31, rf);
+
+	/* enable RF tuning */
+	rf = rt3090_rf_read(sc, 7);
+	rt3090_rf_write(sc, 7, rf | RT3070_TUNE);
+}
+
+int
+rt3090_rf_init(struct rt2860_softc *sc)
+{
+	uint32_t tmp;
+	uint8_t rf, bbp;
+	int i;
+
+	rf = rt3090_rf_read(sc, 30);
+	/* toggle RF R30 bit 7 */
+	rt3090_rf_write(sc, 30, rf | 0x80);
+	DELAY(1000);
+	rt3090_rf_write(sc, 30, rf & ~0x80);
+
+	tmp = RAL_READ(sc, RT3070_LDO_CFG0);
+	tmp &= ~0x1f000000;
+	if (sc->patch_dac && sc->mac_rev < 0x0211)
+		tmp |= 0x0d000000;	/* 1.35V */
+	else
+		tmp |= 0x01000000;	/* 1.2V */
+	RAL_WRITE(sc, RT3070_LDO_CFG0, tmp);
+
+	/* patch LNA_PE_G1 */
+	tmp = RAL_READ(sc, RT3070_GPIO_SWITCH);
+	RAL_WRITE(sc, RT3070_GPIO_SWITCH, tmp & ~0x20);
+
+	/* initialize RF registers to default value */
+	if (sc->mac_ver == 0x3572) {
+		for (i = 0; i < (int)__arraycount(rt3572_def_rf); i++) {
+			rt3090_rf_write(sc, rt3572_def_rf[i].reg,
+			    rt3572_def_rf[i].val);
+		}
+	} else {
+		for (i = 0; i < (int)__arraycount(rt3090_def_rf); i++) {
+			rt3090_rf_write(sc, rt3090_def_rf[i].reg,
+			    rt3090_def_rf[i].val);
+		}
+	}
+
+	/* select 20MHz bandwidth */
+	rt3090_rf_write(sc, 31, 0x14);
+
+	rf = rt3090_rf_read(sc, 6);
+	rt3090_rf_write(sc, 6, rf | 0x40);
+
+	if (sc->mac_ver != 0x3593) {
+		/* calibrate filter for 20MHz bandwidth */
+		sc->rf24_20mhz = 0x1f;	/* default value */
+		rt3090_filter_calib(sc, 0x07, 0x16, &sc->rf24_20mhz);
+
+		/* select 40MHz bandwidth */
+		bbp = rt2860_mcu_bbp_read(sc, 4);
+		rt2860_mcu_bbp_write(sc, 4, (bbp & ~0x08) | 0x10);
+		rf = rt3090_rf_read(sc, 31);
+		rt3090_rf_write(sc, 31, rf | 0x20);
+
+		/* calibrate filter for 40MHz bandwidth */
+		sc->rf24_40mhz = 0x2f;	/* default value */
+		rt3090_filter_calib(sc, 0x27, 0x19, &sc->rf24_40mhz);
+
+		/* go back to 20MHz bandwidth */
+		bbp = rt2860_mcu_bbp_read(sc, 4);
+		rt2860_mcu_bbp_write(sc, 4, bbp & ~0x18);
+	}
+	if (sc->mac_rev < 0x0211)
+		rt3090_rf_write(sc, 27, 0x03);
+
+	tmp = RAL_READ(sc, RT3070_OPT_14);
+	RAL_WRITE(sc, RT3070_OPT_14, tmp | 1);
+
+	if (sc->rf_rev == RT3070_RF_3020)
+		rt3090_set_rx_antenna(sc, 0);
+
+	bbp = rt2860_mcu_bbp_read(sc, 138);
+	if (sc->mac_ver == 0x3593) {
+		if (sc->ntxchains == 1)
+			bbp |= 0x60;	/* turn off DAC1 and DAC2 */
+		else if (sc->ntxchains == 2)
+			bbp |= 0x40;	/* turn off DAC2 */
+		if (sc->nrxchains == 1)
+			bbp &= ~0x06;	/* turn off ADC1 and ADC2 */
+		else if (sc->nrxchains == 2)
+			bbp &= ~0x04;	/* turn off ADC2 */
+	} else {
+		if (sc->ntxchains == 1)
+			bbp |= 0x20;	/* turn off DAC1 */
+		if (sc->nrxchains == 1)
+			bbp &= ~0x02;	/* turn off ADC1 */
+	}
+	rt2860_mcu_bbp_write(sc, 138, bbp);
+
+	rf = rt3090_rf_read(sc, 1);
+	rf &= ~(RT3070_RX0_PD | RT3070_TX0_PD);
+	rf |= RT3070_RF_BLOCK | RT3070_RX1_PD | RT3070_TX1_PD;
+	rt3090_rf_write(sc, 1, rf);
+
+	rf = rt3090_rf_read(sc, 15);
+	rt3090_rf_write(sc, 15, rf & ~RT3070_TX_LO2);
+
+	rf = rt3090_rf_read(sc, 17);
+	rf &= ~RT3070_TX_LO1;
+	if (sc->mac_rev >= 0x0211 && !sc->ext_2ghz_lna)
+		rf |= 0x20;	/* fix for long range Rx issue */
+	if (sc->txmixgain_2ghz >= 2)
+		rf = (rf & ~0x7) | sc->txmixgain_2ghz;
+	rt3090_rf_write(sc, 17, rf);
+
+	rf = rt3090_rf_read(sc, 20);
+	rt3090_rf_write(sc, 20, rf & ~RT3070_RX_LO1);
+
+	rf = rt3090_rf_read(sc, 21);
+	rt3090_rf_write(sc, 21, rf & ~RT3070_RX_LO2);
+
+	return 0;
+}
+
+void
+rt3090_rf_wakeup(struct rt2860_softc *sc)
+{
+	uint32_t tmp;
+	uint8_t rf;
+
+	if (sc->mac_ver == 0x3593) {
+		/* enable VCO */
+		rf = rt3090_rf_read(sc, 1);
+		rt3090_rf_write(sc, 1, rf | RT3593_VCO);
+
+		/* initiate VCO calibration */
+		rf = rt3090_rf_read(sc, 3);
+		rt3090_rf_write(sc, 3, rf | RT3593_VCOCAL);
+
+		/* enable VCO bias current control */
+		rf = rt3090_rf_read(sc, 6);
+		rt3090_rf_write(sc, 6, rf | RT3593_VCO_IC);
+
+		/* initiate res calibration */
+		rf = rt3090_rf_read(sc, 2);
+		rt3090_rf_write(sc, 2, rf | RT3593_RESCAL);
+
+		/* set reference current control to 0.33 mA */
+		rf = rt3090_rf_read(sc, 22);
+		rf &= ~RT3593_CP_IC_MASK;
+		rf |= 1 << RT3593_CP_IC_SHIFT;
+		rt3090_rf_write(sc, 22, rf);
+
+		/* enable RX CTB */
+		rf = rt3090_rf_read(sc, 46);
+		rt3090_rf_write(sc, 46, rf | RT3593_RX_CTB);
+
+		rf = rt3090_rf_read(sc, 20);
+		rf &= ~(RT3593_LDO_RF_VC_MASK | RT3593_LDO_PLL_VC_MASK);
+		rt3090_rf_write(sc, 20, rf);
+	} else {
+		/* enable RF block */
+		rf = rt3090_rf_read(sc, 1);
+		rt3090_rf_write(sc, 1, rf | RT3070_RF_BLOCK);
+
+		/* enable VCO bias current control */
+		rf = rt3090_rf_read(sc, 7);
+		rt3090_rf_write(sc, 7, rf | 0x30);
+
+		rf = rt3090_rf_read(sc, 9);
+		rt3090_rf_write(sc, 9, rf | 0x0e);
+
+		/* enable RX CTB */
+		rf = rt3090_rf_read(sc, 21);
+		rt3090_rf_write(sc, 21, rf | RT3070_RX_CTB);
+
+		/* fix Tx to Rx IQ glitch by raising RF voltage */
+		rf = rt3090_rf_read(sc, 27);
+		rf &= ~0x77;
+		if (sc->mac_rev < 0x0211)
+			rf |= 0x03;
+		rt3090_rf_write(sc, 27, rf);
+	}
+	if (sc->patch_dac && sc->mac_rev < 0x0211) {
+		tmp = RAL_READ(sc, RT3070_LDO_CFG0);
+		tmp = (tmp & ~0x1f000000) | 0x0d000000;
+		RAL_WRITE(sc, RT3070_LDO_CFG0, tmp);
+	}
+}
+
+int
+rt3090_filter_calib(struct rt2860_softc *sc, uint8_t init, uint8_t target,
+    uint8_t *val)
+{
+	uint8_t rf22, rf24;
+	uint8_t bbp55_pb, bbp55_sb, delta;
+	int ntries;
+
+	/* program filter */
+	rf24 = rt3090_rf_read(sc, 24);
+	rf24 = (rf24 & 0xc0) | init;	/* initial filter value */
+	rt3090_rf_write(sc, 24, rf24);
+
+	/* enable baseband loopback mode */
+	rf22 = rt3090_rf_read(sc, 22);
+	rt3090_rf_write(sc, 22, rf22 | RT3070_BB_LOOPBACK);
+
+	/* set power and frequency of passband test tone */
+	rt2860_mcu_bbp_write(sc, 24, 0x00);
+	for (ntries = 0; ntries < 100; ntries++) {
+		/* transmit test tone */
+		rt2860_mcu_bbp_write(sc, 25, 0x90);
+		DELAY(1000);
+		/* read received power */
+		bbp55_pb = rt2860_mcu_bbp_read(sc, 55);
+		if (bbp55_pb != 0)
+			break;
+	}
+	if (ntries == 100)
+		return ETIMEDOUT;
+
+	/* set power and frequency of stopband test tone */
+	rt2860_mcu_bbp_write(sc, 24, 0x06);
+	for (ntries = 0; ntries < 100; ntries++) {
+		/* transmit test tone */
+		rt2860_mcu_bbp_write(sc, 25, 0x90);
+		DELAY(1000);
+		/* read received power */
+		bbp55_sb = rt2860_mcu_bbp_read(sc, 55);
+
+		delta = bbp55_pb - bbp55_sb;
+		if (delta > target)
+			break;
+
+		/* reprogram filter */
+		rf24++;
+		rt3090_rf_write(sc, 24, rf24);
+	}
+	if (ntries < 100) {
+		if (rf24 != init)
+			rf24--;	/* backtrack */
+		*val = rf24;
+		rt3090_rf_write(sc, 24, rf24);
+	}
+
+	/* restore initial state */
+	rt2860_mcu_bbp_write(sc, 24, 0x00);
+
+	/* disable baseband loopback mode */
+	rf22 = rt3090_rf_read(sc, 22);
+	rt3090_rf_write(sc, 22, rf22 & ~RT3070_BB_LOOPBACK);
+
+	return 0;
+}
+
+void
+rt3090_rf_setup(struct rt2860_softc *sc)
+{
+	uint8_t bbp;
+	int i;
+
+	if (sc->mac_rev >= 0x0211) {
+		/* enable DC filter */
+		rt2860_mcu_bbp_write(sc, 103, 0xc0);
+
+		/* improve power consumption */
+		bbp = rt2860_mcu_bbp_read(sc, 31);
+		rt2860_mcu_bbp_write(sc, 31, bbp & ~0x03);
+	}
+
+	RAL_WRITE(sc, RT2860_TX_SW_CFG1, 0);
+	if (sc->mac_rev < 0x0211) {
+		RAL_WRITE(sc, RT2860_TX_SW_CFG2,
+		    sc->patch_dac ? 0x2c : 0x0f);
+	} else
+		RAL_WRITE(sc, RT2860_TX_SW_CFG2, 0);
+
+	/* initialize RF registers from ROM */
+	for (i = 0; i < 10; i++) {
+		if (sc->rf[i].reg == 0 || sc->rf[i].reg == 0xff)
+			continue;
+		rt3090_rf_write(sc, sc->rf[i].reg, sc->rf[i].val);
+	}
+}
+
+void
+rt2860_set_leds(struct rt2860_softc *sc, uint16_t which)
+{
+	rt2860_mcu_cmd(sc, RT2860_MCU_CMD_LEDS,
+	    which | (sc->leds & 0x7f), 0);
+}
+
+/*
+ * Hardware has a general-purpose programmable timer interrupt that can
+ * periodically raise MAC_INT_4.
+ */
+void
+rt2860_set_gp_timer(struct rt2860_softc *sc, int ms)
+{
+	uint32_t tmp;
+
+	/* disable GP timer before reprogramming it */
+	tmp = RAL_READ(sc, RT2860_INT_TIMER_EN);
+	RAL_WRITE(sc, RT2860_INT_TIMER_EN, tmp & ~RT2860_GP_TIMER_EN);
+
+	if (ms == 0)
+		return;
+
+	tmp = RAL_READ(sc, RT2860_INT_TIMER_CFG);
+	ms *= 16;	/* Unit: 64us */
+	tmp = (tmp & 0xffff) | ms << RT2860_GP_TIMER_SHIFT;
+	RAL_WRITE(sc, RT2860_INT_TIMER_CFG, tmp);
+
+	/* enable GP timer */
+	tmp = RAL_READ(sc, RT2860_INT_TIMER_EN);
+	RAL_WRITE(sc, RT2860_INT_TIMER_EN, tmp | RT2860_GP_TIMER_EN);
+}
+
+void
+rt2860_set_bssid(struct rt2860_softc *sc, const uint8_t *bssid)
+{
+	RAL_WRITE(sc, RT2860_MAC_BSSID_DW0,
+	    bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24);
+	RAL_WRITE(sc, RT2860_MAC_BSSID_DW1,
+	    bssid[4] | bssid[5] << 8);
+}
+
+void
+rt2860_set_macaddr(struct rt2860_softc *sc, const uint8_t *addr)
+{
+	RAL_WRITE(sc, RT2860_MAC_ADDR_DW0,
+	    addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24);
+	RAL_WRITE(sc, RT2860_MAC_ADDR_DW1,
+	    addr[4] | addr[5] << 8 | 0xff << 16);
+}
+
+void
+rt2860_updateslot(struct ifnet *ifp)
+{
+	struct rt2860_softc *sc = ifp->if_softc;
+	struct ieee80211com *ic = &sc->sc_ic;
+	uint32_t tmp;
+
+	tmp = RAL_READ(sc, RT2860_BKOFF_SLOT_CFG);
+	tmp &= ~0xff;
+	tmp |= (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
+	RAL_WRITE(sc, RT2860_BKOFF_SLOT_CFG, tmp);
+}
+
+void
+rt2860_updateprot(struct ieee80211com *ic)
+{
+	struct rt2860_softc *sc = ic->ic_ifp->if_softc;
+	uint32_t tmp;
+
+	tmp = RT2860_RTSTH_EN | RT2860_PROT_NAV_SHORT | RT2860_TXOP_ALLOW_ALL;
+	/* setup protection frame rate (MCS code) */
+	tmp |= (ic->ic_curmode == IEEE80211_MODE_11A) ?
+	    rt2860_rates[RT2860_RIDX_OFDM6].mcs :
+	    rt2860_rates[RT2860_RIDX_CCK11].mcs;
+
+	/* CCK frames don't require protection */
+	RAL_WRITE(sc, RT2860_CCK_PROT_CFG, tmp);
+
+	if (ic->ic_flags & IEEE80211_F_USEPROT) {
+		if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
+			tmp |= RT2860_PROT_CTRL_RTS_CTS;
+		else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
+			tmp |= RT2860_PROT_CTRL_CTS;
+	}
+	RAL_WRITE(sc, RT2860_OFDM_PROT_CFG, tmp);
+}
+
+static int
+rt2860_updateedca(struct ieee80211com *ic)
+{
+	struct rt2860_softc *sc = ic->ic_ifp->if_softc;
+	int aci;
+
+	/* update MAC TX configuration registers */
+	for (aci = 0; aci < WME_NUM_AC; aci++) {
+		RAL_WRITE(sc, RT2860_EDCA_AC_CFG(aci),
+		    ic->ic_wme.wme_params[aci].wmep_logcwmax << 16 |
+		    ic->ic_wme.wme_params[aci].wmep_logcwmin << 12 |
+		    ic->ic_wme.wme_params[aci].wmep_aifsn  <<  8 |
+		    ic->ic_wme.wme_params[aci].wmep_txopLimit);
+	}
+
+	/* update SCH/DMA registers too */
+	RAL_WRITE(sc, RT2860_WMM_AIFSN_CFG,
+	    ic->ic_wme.wme_params[WME_AC_VO].wmep_aifsn  << 12 |
+	    ic->ic_wme.wme_params[WME_AC_VI].wmep_aifsn  <<  8 |
+	    ic->ic_wme.wme_params[WME_AC_BK].wmep_aifsn  <<  4 |
+	    ic->ic_wme.wme_params[WME_AC_BE].wmep_aifsn);
+	RAL_WRITE(sc, RT2860_WMM_CWMIN_CFG,
+	    ic->ic_wme.wme_params[WME_AC_VO].wmep_logcwmin << 12 |
+	    ic->ic_wme.wme_params[WME_AC_VI].wmep_logcwmin <<  8 |
+	    ic->ic_wme.wme_params[WME_AC_BK].wmep_logcwmin <<  4 |
+	    ic->ic_wme.wme_params[WME_AC_BE].wmep_logcwmin);
+	RAL_WRITE(sc, RT2860_WMM_CWMAX_CFG,
+	    ic->ic_wme.wme_params[WME_AC_VO].wmep_logcwmax << 12 |
+	    ic->ic_wme.wme_params[WME_AC_VI].wmep_logcwmax <<  8 |
+	    ic->ic_wme.wme_params[WME_AC_BK].wmep_logcwmax <<  4 |
+	    ic->ic_wme.wme_params[WME_AC_BE].wmep_logcwmax);
+	RAL_WRITE(sc, RT2860_WMM_TXOP0_CFG,
+	    ic->ic_wme.wme_params[WME_AC_BK].wmep_txopLimit << 16 |
+	    ic->ic_wme.wme_params[WME_AC_BE].wmep_txopLimit);
+	RAL_WRITE(sc, RT2860_WMM_TXOP1_CFG,
+	    ic->ic_wme.wme_params[WME_AC_VO].wmep_txopLimit << 16 |
+	    ic->ic_wme.wme_params[WME_AC_VI].wmep_txopLimit);
+	return 0;
+}
+
+static int
+rt2860_set_key(struct ieee80211com *ic, const struct ieee80211_key *ck,
+    const uint8_t *mac)
+{
+	struct rt2860_softc *sc = ic->ic_ifp->if_softc;
+	struct ieee80211_node *ni = ic->ic_bss;
+	bus_size_t base;
+	uint32_t attr;
+	uint8_t mode, wcid, iv[8];
+	struct ieee80211_key *k = __UNCONST(ck); /* XXX */
+
+	/* map net80211 cipher to RT2860 security mode */
+	switch (k->wk_cipher->ic_cipher) {
+	case IEEE80211_CIPHER_WEP:
+		k->wk_flags |= IEEE80211_KEY_GROUP; /* XXX */
+		if (k->wk_keylen == 5)
+			mode = RT2860_MODE_WEP40;
+		else
+			mode = RT2860_MODE_WEP104;
+		break;
+	case IEEE80211_CIPHER_TKIP:
+		mode = RT2860_MODE_TKIP;
+		break;
+	case IEEE80211_CIPHER_AES_CCM:
+		mode = RT2860_MODE_AES_CCMP;
+		break;
+	default:
+		return EINVAL;
+	}
+
+	if (k->wk_flags & IEEE80211_KEY_GROUP) {
+		wcid = 0;	/* NB: update WCID0 for group keys */
+		base = RT2860_SKEY(0, k->wk_keyix);
+	} else {
+		wcid = ((struct rt2860_node *)ni)->wcid;
+		base = RT2860_PKEY(wcid);
+	}
+
+	if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_TKIP) {
+		RAL_WRITE_REGION_1(sc, base, k->wk_key, 16);
+#ifndef IEEE80211_STA_ONLY
+		if (ic->ic_opmode == IEEE80211_M_HOSTAP) {
+			RAL_WRITE_REGION_1(sc, base + 16, &k->wk_key[16], 8);
+			RAL_WRITE_REGION_1(sc, base + 24, &k->wk_key[24], 8);
+		} else
+#endif
+		{
+			RAL_WRITE_REGION_1(sc, base + 16, &k->wk_key[24], 8);
+			RAL_WRITE_REGION_1(sc, base + 24, &k->wk_key[16], 8);
+		}
+	} else
+		RAL_WRITE_REGION_1(sc, base, k->wk_key, k->wk_keylen);
+
+	if (!(k->wk_flags & IEEE80211_KEY_GROUP) ||
+	    (k->wk_flags & IEEE80211_KEY_XMIT)) {
+		/* set initial packet number in IV+EIV */
+		if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_WEP) {
+			uint32_t val = cprng_fast32();
+			/* skip weak IVs from Fluhrer/Mantin/Shamir */
+			if (val >= 0x03ff00 && (val & 0xf8ff00) == 0x00ff00)
+				val += 0x000100;
+			iv[0] = val;
+			iv[1] = val >> 8;
+			iv[2] = val >> 16;
+			iv[3] = k->wk_keyix << 6;
+			iv[4] = iv[5] = iv[6] = iv[7] = 0;
+		} else {
+			if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_TKIP) {
+				iv[0] = k->wk_keytsc >> 8;
+				iv[1] = (iv[0] | 0x20) & 0x7f;
+				iv[2] = k->wk_keytsc;
+			} else /* CCMP */ {
+				iv[0] = k->wk_keytsc;
+				iv[1] = k->wk_keytsc >> 8;
+				iv[2] = 0;
+			}
+			iv[3] = k->wk_keyix << 6 | IEEE80211_WEP_EXTIV;
+			iv[4] = k->wk_keytsc >> 16;
+			iv[5] = k->wk_keytsc >> 24;
+			iv[6] = k->wk_keytsc >> 32;
+			iv[7] = k->wk_keytsc >> 40;
+		}
+		RAL_WRITE_REGION_1(sc, RT2860_IVEIV(wcid), iv, 8);
+	}
+
+	if (k->wk_flags & IEEE80211_KEY_GROUP) {
+		/* install group key */
+		attr = RAL_READ(sc, RT2860_SKEY_MODE_0_7);
+		attr &= ~(0xf << (k->wk_keyix * 4));
+		attr |= mode << (k->wk_keyix * 4);
+		RAL_WRITE(sc, RT2860_SKEY_MODE_0_7, attr);
+	} else {
+		/* install pairwise key */
+		attr = RAL_READ(sc, RT2860_WCID_ATTR(wcid));
+		attr = (attr & ~0xf) | (mode << 1) | RT2860_RX_PKEY_EN;
+		RAL_WRITE(sc, RT2860_WCID_ATTR(wcid), attr);
+	}
+	return 1;
+}
+
+static int
+rt2860_delete_key(struct ieee80211com *ic, const struct ieee80211_key *k)
+{
+	struct rt2860_softc *sc = ic->ic_ifp->if_softc;
+	struct ieee80211_node *ni = ic->ic_bss;
+	uint32_t attr;
+	uint8_t wcid;
+
+	if (k->wk_flags & IEEE80211_KEY_GROUP) {
+		/* remove group key */
+		attr = RAL_READ(sc, RT2860_SKEY_MODE_0_7);
+		attr &= ~(0xf << (k->wk_keyix * 4));
+		RAL_WRITE(sc, RT2860_SKEY_MODE_0_7, attr);
+
+	} else {
+		/* remove pairwise key */
+		wcid = ((struct rt2860_node *)ni)->wcid;
+		attr = RAL_READ(sc, RT2860_WCID_ATTR(wcid));
+		attr &= ~0xf;
+		RAL_WRITE(sc, RT2860_WCID_ATTR(wcid), attr);
+	}
+	return 1;
+}
+
+int8_t
+rt2860_rssi2dbm(struct rt2860_softc *sc, uint8_t rssi, uint8_t rxchain)
+{
+	struct ieee80211com *ic = &sc->sc_ic;
+	struct ieee80211_channel *c = ic->ic_ibss_chan;
+	int delta;
+
+	if (IEEE80211_IS_CHAN_5GHZ(c)) {
+		u_int chan = ieee80211_chan2ieee(ic, c);
+		delta = sc->rssi_5ghz[rxchain];
+
+		/* determine channel group */
+		if (chan <= 64)
+			delta -= sc->lna[1];
+		else if (chan <= 128)
+			delta -= sc->lna[2];
+		else
+			delta -= sc->lna[3];
+	} else
+		delta = sc->rssi_2ghz[rxchain] - sc->lna[0];
+
+	return -12 - delta - rssi;
+}
+
+/*
+ * Add `delta' (signed) to each 4-bit sub-word of a 32-bit word.
+ * Used to adjust per-rate Tx power registers.
+ */
+static __inline uint32_t
+b4inc(uint32_t b32, int8_t delta)
+{
+	int8_t i, b4;
+
+	for (i = 0; i < 8; i++) {
+		b4 = b32 & 0xf;
+		b4 += delta;
+		if (b4 < 0)
+			b4 = 0;
+		else if (b4 > 0xf)
+			b4 = 0xf;
+		b32 = b32 >> 4 | b4 << 28;
+	}
+	return b32;
+}
+
+const char *
+rt2860_get_rf(uint8_t rev)
+{
+	switch (rev) {
+	case RT2860_RF_2820:	return "RT2820";
+	case RT2860_RF_2850:	return "RT2850";
+	case RT2860_RF_2720:	return "RT2720";
+	case RT2860_RF_2750:	return "RT2750";
+	case RT3070_RF_3020:	return "RT3020";
+	case RT3070_RF_2020:	return "RT2020";
+	case RT3070_RF_3021:	return "RT3021";
+	case RT3070_RF_3022:	return "RT3022";
+	case RT3070_RF_3052:	return "RT3052";
+	case RT3070_RF_3320:	return "RT3320";
+	case RT3070_RF_3053:	return "RT3053";
+	default:		return "unknown";
+	}
+}
+
+int
+rt2860_read_eeprom(struct rt2860_softc *sc)
+{
+	struct ieee80211com *ic = &sc->sc_ic;
+	int8_t delta_2ghz, delta_5ghz;
+	uint32_t tmp;
+	uint16_t val;
+	int ridx, ant, i;
+
+	/* check whether the ROM is eFUSE ROM or EEPROM */
+	sc->sc_srom_read = rt2860_eeprom_read_2;
+	if (sc->mac_ver >= 0x3071) {
+		tmp = RAL_READ(sc, RT3070_EFUSE_CTRL);
+		DPRINTF(("EFUSE_CTRL=0x%08x\n", tmp));
+		if (tmp & RT3070_SEL_EFUSE)
+			sc->sc_srom_read = rt3090_efuse_read_2;
+	}
+
+	/* read EEPROM version */
+	val = rt2860_srom_read(sc, RT2860_EEPROM_VERSION);
+	DPRINTF(("EEPROM rev=%d, FAE=%d\n", val & 0xff, val >> 8));
+
+	/* read MAC address */
+	val = rt2860_srom_read(sc, RT2860_EEPROM_MAC01);
+	ic->ic_myaddr[0] = val & 0xff;
+	ic->ic_myaddr[1] = val >> 8;
+	val = rt2860_srom_read(sc, RT2860_EEPROM_MAC23);
+	ic->ic_myaddr[2] = val & 0xff;
+	ic->ic_myaddr[3] = val >> 8;
+	val = rt2860_srom_read(sc, RT2860_EEPROM_MAC45);
+	ic->ic_myaddr[4] = val & 0xff;
+	ic->ic_myaddr[5] = val >> 8;
+
+	/* read country code */
+	val = rt2860_srom_read(sc, RT2860_EEPROM_COUNTRY);
+	DPRINTF(("EEPROM region code=0x%04x\n", val));
+
+	/* read vendor BBP settings */
+	for (i = 0; i < 8; i++) {
+		val = rt2860_srom_read(sc, RT2860_EEPROM_BBP_BASE + i);
+		sc->bbp[i].val = val & 0xff;
+		sc->bbp[i].reg = val >> 8;
+		DPRINTF(("BBP%d=0x%02x\n", sc->bbp[i].reg, sc->bbp[i].val));
+	}
+	if (sc->mac_ver >= 0x3071) {
+		/* read vendor RF settings */
+		for (i = 0; i < 10; i++) {
+			val = rt2860_srom_read(sc, RT3071_EEPROM_RF_BASE + i);
+			sc->rf[i].val = val & 0xff;
+			sc->rf[i].reg = val >> 8;
+			DPRINTF(("RF%d=0x%02x\n", sc->rf[i].reg,
+			    sc->rf[i].val));
+		}
+	}
+
+	/* read RF frequency offset from EEPROM */
+	val = rt2860_srom_read(sc, RT2860_EEPROM_FREQ_LEDS);
+	sc->freq = ((val & 0xff) != 0xff) ? val & 0xff : 0;
+	DPRINTF(("EEPROM freq offset %d\n", sc->freq & 0xff));
+	if ((val >> 8) != 0xff) {
+		/* read LEDs operating mode */
+		sc->leds = val >> 8;
+		sc->led[0] = rt2860_srom_read(sc, RT2860_EEPROM_LED1);
+		sc->led[1] = rt2860_srom_read(sc, RT2860_EEPROM_LED2);
+		sc->led[2] = rt2860_srom_read(sc, RT2860_EEPROM_LED3);
+	} else {
+		/* broken EEPROM, use default settings */
+		sc->leds = 0x01;
+		sc->led[0] = 0x5555;
+		sc->led[1] = 0x2221;
+		sc->led[2] = 0xa9f8;
+	}
+	DPRINTF(("EEPROM LED mode=0x%02x, LEDs=0x%04x/0x%04x/0x%04x\n",
+	    sc->leds, sc->led[0], sc->led[1], sc->led[2]));
+
+	/* read RF information */
+	val = rt2860_srom_read(sc, RT2860_EEPROM_ANTENNA);
+	if (val == 0xffff) {
+		DPRINTF(("invalid EEPROM antenna info, using default\n"));
+		if (sc->mac_ver == 0x3593) {
+			/* default to RF3053 3T3R */
+			sc->rf_rev = RT3070_RF_3053;
+			sc->ntxchains = 3;
+			sc->nrxchains = 3;
+		} else if (sc->mac_ver >= 0x3071) {
+			/* default to RF3020 1T1R */
+			sc->rf_rev = RT3070_RF_3020;
+			sc->ntxchains = 1;
+			sc->nrxchains = 1;
+		} else {
+			/* default to RF2820 1T2R */
+			sc->rf_rev = RT2860_RF_2820;
+			sc->ntxchains = 1;
+			sc->nrxchains = 2;
+		}
+	} else {
+		sc->rf_rev = (val >> 8) & 0xf;
+		sc->ntxchains = (val >> 4) & 0xf;
+		sc->nrxchains = val & 0xf;
+	}
+	DPRINTF(("EEPROM RF rev=0x%02x chains=%dT%dR\n",
+	    sc->rf_rev, sc->ntxchains, sc->nrxchains));
+
+	/* check if RF supports automatic Tx access gain control */
+	val = rt2860_srom_read(sc, RT2860_EEPROM_CONFIG);
+	DPRINTF(("EEPROM CFG 0x%04x\n", val));
+	/* check if driver should patch the DAC issue */
+	if ((val >> 8) != 0xff)
+		sc->patch_dac = (val >> 15) & 1;
+	if ((val & 0xff) != 0xff) {
+		sc->ext_5ghz_lna = (val >> 3) & 1;
+		sc->ext_2ghz_lna = (val >> 2) & 1;
+		/* check if RF supports automatic Tx access gain control */
+		sc->calib_2ghz = sc->calib_5ghz = 0; /* XXX (val >> 1) & 1 */;
+		/* check if we have a hardware radio switch */
+		sc->rfswitch = val & 1;
+	}
+	if (sc->sc_flags & RT2860_ADVANCED_PS) {
+		/* read PCIe power save level */
+		val = rt2860_srom_read(sc, RT2860_EEPROM_PCIE_PSLEVEL);
+		if ((val & 0xff) != 0xff) {
+			sc->pslevel = val & 0x3;
+			val = rt2860_srom_read(sc, RT2860_EEPROM_REV);
+			if ((val & 0xff80) != 0x9280)
+				sc->pslevel = MIN(sc->pslevel, 1);
+			DPRINTF(("EEPROM PCIe PS Level=%d\n", sc->pslevel));
+		}
+	}
+
+	/* read power settings for 2GHz channels */
+	for (i = 0; i < 14; i += 2) {
+		val = rt2860_srom_read(sc,
+		    RT2860_EEPROM_PWR2GHZ_BASE1 + i / 2);
+		sc->txpow1[i + 0] = (int8_t)(val & 0xff);
+		sc->txpow1[i + 1] = (int8_t)(val >> 8);
+
+		val = rt2860_srom_read(sc,
+		    RT2860_EEPROM_PWR2GHZ_BASE2 + i / 2);
+		sc->txpow2[i + 0] = (int8_t)(val & 0xff);
+		sc->txpow2[i + 1] = (int8_t)(val >> 8);
+	}
+	/* fix broken Tx power entries */
+	for (i = 0; i < 14; i++) {
+		if (sc->txpow1[i] < 0 || sc->txpow1[i] > 31)
+			sc->txpow1[i] = 5;
+		if (sc->txpow2[i] < 0 || sc->txpow2[i] > 31)
+			sc->txpow2[i] = 5;
+		DPRINTF(("chan %d: power1=%d, power2=%d\n",
+		    rt2860_rf2850[i].chan, sc->txpow1[i], sc->txpow2[i]));
+	}
+	/* read power settings for 5GHz channels */
+	for (i = 0; i < 40; i += 2) {
+		val = rt2860_srom_read(sc,
+		    RT2860_EEPROM_PWR5GHZ_BASE1 + i / 2);
+		sc->txpow1[i + 14] = (int8_t)(val & 0xff);
+		sc->txpow1[i + 15] = (int8_t)(val >> 8);
+
+		val = rt2860_srom_read(sc,
+		    RT2860_EEPROM_PWR5GHZ_BASE2 + i / 2);
+		sc->txpow2[i + 14] = (int8_t)(val & 0xff);
+		sc->txpow2[i + 15] = (int8_t)(val >> 8);
+	}
+	/* fix broken Tx power entries */
+	for (i = 0; i < 40; i++) {
+		if (sc->txpow1[14 + i] < -7 || sc->txpow1[14 + i] > 15)
+			sc->txpow1[14 + i] = 5;
+		if (sc->txpow2[14 + i] < -7 || sc->txpow2[14 + i] > 15)
+			sc->txpow2[14 + i] = 5;
+		DPRINTF(("chan %d: power1=%d, power2=%d\n",
+		    rt2860_rf2850[14 + i].chan, sc->txpow1[14 + i],
+		    sc->txpow2[14 + i]));
+	}
+
+	/* read Tx power compensation for each Tx rate */
+	val = rt2860_srom_read(sc, RT2860_EEPROM_DELTAPWR);
+	delta_2ghz = delta_5ghz = 0;
+	if ((val & 0xff) != 0xff && (val & 0x80)) {
+		delta_2ghz = val & 0xf;
+		if (!(val & 0x40))	/* negative number */
+			delta_2ghz = -delta_2ghz;
+	}
+	val >>= 8;
+	if ((val & 0xff) != 0xff && (val & 0x80)) {
+		delta_5ghz = val & 0xf;
+		if (!(val & 0x40))	/* negative number */
+			delta_5ghz = -delta_5ghz;
+	}
+	DPRINTF(("power compensation=%d (2GHz), %d (5GHz)\n",
+	    delta_2ghz, delta_5ghz));
+
+	for (ridx = 0; ridx < 5; ridx++) {
+		uint32_t reg;
+
+		val = rt2860_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2);
+		reg = val;
+		val = rt2860_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2 + 1);
+		reg |= (uint32_t)val << 16;
+
+		sc->txpow20mhz[ridx] = reg;
+		sc->txpow40mhz_2ghz[ridx] = b4inc(reg, delta_2ghz);
+		sc->txpow40mhz_5ghz[ridx] = b4inc(reg, delta_5ghz);
+
+		DPRINTF(("ridx %d: power 20MHz=0x%08x, 40MHz/2GHz=0x%08x, "
+		    "40MHz/5GHz=0x%08x\n", ridx, sc->txpow20mhz[ridx],
+		    sc->txpow40mhz_2ghz[ridx], sc->txpow40mhz_5ghz[ridx]));
+	}
+
+	/* read factory-calibrated samples for temperature compensation */
+	val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI1_2GHZ);
+	sc->tssi_2ghz[0] = val & 0xff;	/* [-4] */
+	sc->tssi_2ghz[1] = val >> 8;	/* [-3] */
+	val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI2_2GHZ);
+	sc->tssi_2ghz[2] = val & 0xff;	/* [-2] */
+	sc->tssi_2ghz[3] = val >> 8;	/* [-1] */
+	val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI3_2GHZ);
+	sc->tssi_2ghz[4] = val & 0xff;	/* [+0] */
+	sc->tssi_2ghz[5] = val >> 8;	/* [+1] */
+	val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI4_2GHZ);
+	sc->tssi_2ghz[6] = val & 0xff;	/* [+2] */
+	sc->tssi_2ghz[7] = val >> 8;	/* [+3] */
+	val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI5_2GHZ);
+	sc->tssi_2ghz[8] = val & 0xff;	/* [+4] */
+	sc->step_2ghz = val >> 8;
+	DPRINTF(("TSSI 2GHz: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x "
+	    "0x%02x 0x%02x step=%d\n", sc->tssi_2ghz[0], sc->tssi_2ghz[1],
+	    sc->tssi_2ghz[2], sc->tssi_2ghz[3], sc->tssi_2ghz[4],
+	    sc->tssi_2ghz[5], sc->tssi_2ghz[6], sc->tssi_2ghz[7],
+	    sc->tssi_2ghz[8], sc->step_2ghz));
+	/* check that ref value is correct, otherwise disable calibration */
+	if (sc->tssi_2ghz[4] == 0xff)
+		sc->calib_2ghz = 0;
+
+	val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI1_5GHZ);
+	sc->tssi_5ghz[0] = val & 0xff;	/* [-4] */
+	sc->tssi_5ghz[1] = val >> 8;	/* [-3] */
+	val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI2_5GHZ);
+	sc->tssi_5ghz[2] = val & 0xff;	/* [-2] */
+	sc->tssi_5ghz[3] = val >> 8;	/* [-1] */
+	val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI3_5GHZ);
+	sc->tssi_5ghz[4] = val & 0xff;	/* [+0] */
+	sc->tssi_5ghz[5] = val >> 8;	/* [+1] */
+	val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI4_5GHZ);
+	sc->tssi_5ghz[6] = val & 0xff;	/* [+2] */
+	sc->tssi_5ghz[7] = val >> 8;	/* [+3] */
+	val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI5_5GHZ);
+	sc->tssi_5ghz[8] = val & 0xff;	/* [+4] */
+	sc->step_5ghz = val >> 8;
+	DPRINTF(("TSSI 5GHz: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x "
+	    "0x%02x 0x%02x step=%d\n", sc->tssi_5ghz[0], sc->tssi_5ghz[1],
+	    sc->tssi_5ghz[2], sc->tssi_5ghz[3], sc->tssi_5ghz[4],
+	    sc->tssi_5ghz[5], sc->tssi_5ghz[6], sc->tssi_5ghz[7],
+	    sc->tssi_5ghz[8], sc->step_5ghz));
+	/* check that ref value is correct, otherwise disable calibration */
+	if (sc->tssi_5ghz[4] == 0xff)
+		sc->calib_5ghz = 0;
+
+	/* read RSSI offsets and LNA gains from EEPROM */
+	val = rt2860_srom_read(sc, RT2860_EEPROM_RSSI1_2GHZ);
+	sc->rssi_2ghz[0] = val & 0xff;	/* Ant A */
+	sc->rssi_2ghz[1] = val >> 8;	/* Ant B */
+	val = rt2860_srom_read(sc, RT2860_EEPROM_RSSI2_2GHZ);
+	if (sc->mac_ver >= 0x3071) {
+		/*
+		 * On RT3090 chips (limited to 2 Rx chains), this ROM
+		 * field contains the Tx mixer gain for the 2GHz band.
+		 */
+		if ((val & 0xff) != 0xff)
+			sc->txmixgain_2ghz = val & 0x7;
+		DPRINTF(("tx mixer gain=%u (2GHz)\n", sc->txmixgain_2ghz));
+	} else
+		sc->rssi_2ghz[2] = val & 0xff;	/* Ant C */
+	sc->lna[2] = val >> 8;		/* channel group 2 */
+
+	val = rt2860_srom_read(sc, RT2860_EEPROM_RSSI1_5GHZ);
+	sc->rssi_5ghz[0] = val & 0xff;	/* Ant A */
+	sc->rssi_5ghz[1] = val >> 8;	/* Ant B */
+	val = rt2860_srom_read(sc, RT2860_EEPROM_RSSI2_5GHZ);
+	sc->rssi_5ghz[2] = val & 0xff;	/* Ant C */
+	sc->lna[3] = val >> 8;		/* channel group 3 */
+
+	val = rt2860_srom_read(sc, RT2860_EEPROM_LNA);
+	if (sc->mac_ver >= 0x3071)
+		sc->lna[0] = RT3090_DEF_LNA;
+	else				/* channel group 0 */
+		sc->lna[0] = val & 0xff;
+	sc->lna[1] = val >> 8;		/* channel group 1 */
+
+	/* fix broken 5GHz LNA entries */
+	if (sc->lna[2] == 0 || sc->lna[2] == 0xff) {
+		DPRINTF(("invalid LNA for channel group %d\n", 2));
+		sc->lna[2] = sc->lna[1];
+	}
+	if (sc->lna[3] == 0 || sc->lna[3] == 0xff) {
+		DPRINTF(("invalid LNA for channel group %d\n", 3));
+		sc->lna[3] = sc->lna[1];
+	}
+
+	/* fix broken RSSI offset entries */
+	for (ant = 0; ant < 3; ant++) {
+		if (sc->rssi_2ghz[ant] < -10 || sc->rssi_2ghz[ant] > 10) {
+			DPRINTF(("invalid RSSI%d offset: %d (2GHz)\n",
+			    ant + 1, sc->rssi_2ghz[ant]));
+			sc->rssi_2ghz[ant] = 0;
+		}
+		if (sc->rssi_5ghz[ant] < -10 || sc->rssi_5ghz[ant] > 10) {
+			DPRINTF(("invalid RSSI%d offset: %d (5GHz)\n",
+			    ant + 1, sc->rssi_5ghz[ant]));
+			sc->rssi_5ghz[ant] = 0;
+		}
+	}
+
+	return 0;
+}
+
+int
+rt2860_bbp_init(struct rt2860_softc *sc)
+{
+	int i, ntries;
+
+	/* wait for BBP to wake up */
+	for (ntries = 0; ntries < 20; ntries++) {
+		uint8_t bbp0 = rt2860_mcu_bbp_read(sc, 0);
+		if (bbp0 != 0 && bbp0 != 0xff)
+			break;
+	}
+	if (ntries == 20) {
+		aprint_error_dev(sc->sc_dev,
+		    "timeout waiting for BBP to wake up\n");
+		return ETIMEDOUT;
+	}
+
+	/* initialize BBP registers to default values */
+	for (i = 0; i < (int)__arraycount(rt2860_def_bbp); i++) {
+		rt2860_mcu_bbp_write(sc, rt2860_def_bbp[i].reg,
+		    rt2860_def_bbp[i].val);
+	}
+
+	/* fix BBP84 for RT2860E */
+	if (sc->mac_ver == 0x2860 && sc->mac_rev != 0x0101)
+		rt2860_mcu_bbp_write(sc, 84, 0x19);
+
+	if (sc->mac_ver >= 0x3071) {
+		rt2860_mcu_bbp_write(sc, 79, 0x13);
+		rt2860_mcu_bbp_write(sc, 80, 0x05);
+		rt2860_mcu_bbp_write(sc, 81, 0x33);
+	} else if (sc->mac_ver == 0x2860 && sc->mac_rev == 0x0100) {
+		rt2860_mcu_bbp_write(sc, 69, 0x16);
+		rt2860_mcu_bbp_write(sc, 73, 0x12);
+	}
+
+	return 0;
+}
+
+int
+rt2860_txrx_enable(struct rt2860_softc *sc)
+{
+	uint32_t tmp;
+	int ntries;
+
+	/* enable Tx/Rx DMA engine */
+	RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, RT2860_MAC_TX_EN);
+	RAL_BARRIER_READ_WRITE(sc);
+	for (ntries = 0; ntries < 200; ntries++) {
+		tmp = RAL_READ(sc, RT2860_WPDMA_GLO_CFG);
+		if ((tmp & (RT2860_TX_DMA_BUSY | RT2860_RX_DMA_BUSY)) == 0)
+			break;
+		DELAY(1000);
+	}
+	if (ntries == 200) {
+		aprint_error_dev(sc->sc_dev,
+		    "timeout waiting for DMA engine\n");
+		return ETIMEDOUT;
+	}
+
+	DELAY(50);
+
+	tmp |= RT2860_RX_DMA_EN | RT2860_TX_DMA_EN |
+	    RT2860_WPDMA_BT_SIZE64 << RT2860_WPDMA_BT_SIZE_SHIFT;
+	RAL_WRITE(sc, RT2860_WPDMA_GLO_CFG, tmp);
+
+	/* set Rx filter */
+	tmp = RT2860_DROP_CRC_ERR | RT2860_DROP_PHY_ERR;
+	if (sc->sc_ic.ic_opmode != IEEE80211_M_MONITOR) {
+		tmp |= RT2860_DROP_UC_NOME | RT2860_DROP_DUPL |
+		    RT2860_DROP_CTS | RT2860_DROP_BA | RT2860_DROP_ACK |
+		    RT2860_DROP_VER_ERR | RT2860_DROP_CTRL_RSV |
+		    RT2860_DROP_CFACK | RT2860_DROP_CFEND;
+		if (sc->sc_ic.ic_opmode == IEEE80211_M_STA)
+			tmp |= RT2860_DROP_RTS | RT2860_DROP_PSPOLL;
+	}
+	RAL_WRITE(sc, RT2860_RX_FILTR_CFG, tmp);
+
+	RAL_WRITE(sc, RT2860_MAC_SYS_CTRL,
+	    RT2860_MAC_RX_EN | RT2860_MAC_TX_EN);
+
+	return 0;
+}
+
+int
+rt2860_init(struct ifnet *ifp)
+{
+	struct rt2860_softc *sc = ifp->if_softc;
+	struct ieee80211com *ic = &sc->sc_ic;
+	uint32_t tmp;
+	uint8_t bbp1, bbp3;
+	int i, qid, ridx, ntries, error;
+
+	/* for CardBus, power on the socket */
+	if (!(sc->sc_flags & RT2860_ENABLED)) {
+		if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) {
+			aprint_error_dev(sc->sc_dev,
+			    "could not enable device\n");
+			return EIO;
+		}
+		sc->sc_flags |= RT2860_ENABLED;
+	}
+
+	if (sc->rfswitch) {
+		/* hardware has a radio switch on GPIO pin 2 */
+		if (!(RAL_READ(sc, RT2860_GPIO_CTRL) & (1 << 2))) {
+			aprint_normal_dev(sc->sc_dev,
+			    "radio is disabled by hardware switch\n");
+#ifdef notyet
+			rt2860_stop(ifp, 1);
+			return EPERM;
+#endif
+		}
+	}
+	RAL_WRITE(sc, RT2860_PWR_PIN_CFG, RT2860_IO_RA_PE);
+
+	/* disable DMA */
+	tmp = RAL_READ(sc, RT2860_WPDMA_GLO_CFG);
+	tmp &= 0xff0;
+	RAL_WRITE(sc, RT2860_WPDMA_GLO_CFG, tmp);
+
+	/* PBF hardware reset */
+	RAL_WRITE(sc, RT2860_SYS_CTRL, 0xe1f);
+	RAL_BARRIER_WRITE(sc);
+	RAL_WRITE(sc, RT2860_SYS_CTRL, 0xe00);
+
+	if ((error = rt2860_load_microcode(sc)) != 0) {
+		aprint_error_dev(sc->sc_dev,
+		    "could not load 8051 microcode\n");
+		rt2860_stop(ifp, 1);
+		return error;
+	}
+
+	IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl));
+	rt2860_set_macaddr(sc, ic->ic_myaddr);
+
+	/* init Tx power for all Tx rates (from EEPROM) */
+	for (ridx = 0; ridx < 5; ridx++) {
+		if (sc->txpow20mhz[ridx] == 0xffffffff)
+			continue;
+		RAL_WRITE(sc, RT2860_TX_PWR_CFG(ridx), sc->txpow20mhz[ridx]);
+	}
+
+	for (ntries = 0; ntries < 100; ntries++) {
+		tmp = RAL_READ(sc, RT2860_WPDMA_GLO_CFG);
+		if ((tmp & (RT2860_TX_DMA_BUSY | RT2860_RX_DMA_BUSY)) == 0)
+			break;
+		DELAY(1000);
+	}
+	if (ntries == 100) {
+		aprint_error_dev(sc->sc_dev,
+		    "timeout waiting for DMA engine\n");
+		rt2860_stop(ifp, 1);
+		return ETIMEDOUT;
+	}
+	tmp &= 0xff0;
+	RAL_WRITE(sc, RT2860_WPDMA_GLO_CFG, tmp);
+
+	/* reset Rx ring and all 6 Tx rings */
+	RAL_WRITE(sc, RT2860_WPDMA_RST_IDX, 0x1003f);
+
+	/* PBF hardware reset */
+	RAL_WRITE(sc, RT2860_SYS_CTRL, 0xe1f);
+	RAL_BARRIER_WRITE(sc);
+	RAL_WRITE(sc, RT2860_SYS_CTRL, 0xe00);
+
+	RAL_WRITE(sc, RT2860_PWR_PIN_CFG, RT2860_IO_RA_PE | RT2860_IO_RF_PE);
+
+	RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, RT2860_BBP_HRST | RT2860_MAC_SRST);
+	RAL_BARRIER_WRITE(sc);
+	RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, 0);
+
+	for (i = 0; i < (int)__arraycount(rt2860_def_mac); i++)
+		RAL_WRITE(sc, rt2860_def_mac[i].reg, rt2860_def_mac[i].val);
+	if (sc->mac_ver >= 0x3071) {
+		/* set delay of PA_PE assertion to 1us (unit of 0.25us) */
+		RAL_WRITE(sc, RT2860_TX_SW_CFG0,
+		    4 << RT2860_DLY_PAPE_EN_SHIFT);
+	}
+
+	if (!(RAL_READ(sc, RT2860_PCI_CFG) & RT2860_PCI_CFG_PCI)) {
+		sc->sc_flags |= RT2860_PCIE;
+		/* PCIe has different clock cycle count than PCI */
+		tmp = RAL_READ(sc, RT2860_US_CYC_CNT);
+		tmp = (tmp & ~0xff) | 0x7d;
+		RAL_WRITE(sc, RT2860_US_CYC_CNT, tmp);
+	}
+
+	/* wait while MAC is busy */
+	for (ntries = 0; ntries < 100; ntries++) {
+		if (!(RAL_READ(sc, RT2860_MAC_STATUS_REG) &
+		    (RT2860_RX_STATUS_BUSY | RT2860_TX_STATUS_BUSY)))
+			break;
+		DELAY(1000);
+	}
+	if (ntries == 100) {
+		aprint_error_dev(sc->sc_dev, "timeout waiting for MAC\n");
+		rt2860_stop(ifp, 1);
+		return ETIMEDOUT;
+	}
+
+	/* clear Host to MCU mailbox */
+	RAL_WRITE(sc, RT2860_H2M_BBPAGENT, 0);
+	RAL_WRITE(sc, RT2860_H2M_MAILBOX, 0);
+
+	rt2860_mcu_cmd(sc, RT2860_MCU_CMD_RFRESET, 0, 0);
+	DELAY(1000);
+
+	if ((error = rt2860_bbp_init(sc)) != 0) {
+		rt2860_stop(ifp, 1);
+		return error;
+	}
+
+	/* clear RX WCID search table */
+	RAL_SET_REGION_4(sc, RT2860_WCID_ENTRY(0), 0, 512);
+	/* clear pairwise key table */
+	RAL_SET_REGION_4(sc, RT2860_PKEY(0), 0, 2048);
+	/* clear IV/EIV table */
+	RAL_SET_REGION_4(sc, RT2860_IVEIV(0), 0, 512);
+	/* clear WCID attribute table */
+	RAL_SET_REGION_4(sc, RT2860_WCID_ATTR(0), 0, 256);
+	/* clear shared key table */
+	RAL_SET_REGION_4(sc, RT2860_SKEY(0, 0), 0, 8 * 32);
+	/* clear shared key mode */
+	RAL_SET_REGION_4(sc, RT2860_SKEY_MODE_0_7, 0, 4);
+
+	/* init Tx rings (4 EDCAs + HCCA + Mgt) */
+	for (qid = 0; qid < 6; qid++) {
+		RAL_WRITE(sc, RT2860_TX_BASE_PTR(qid), sc->txq[qid].paddr);
+		RAL_WRITE(sc, RT2860_TX_MAX_CNT(qid), RT2860_TX_RING_COUNT);
+		RAL_WRITE(sc, RT2860_TX_CTX_IDX(qid), 0);
+	}
+
+	/* init Rx ring */
+	RAL_WRITE(sc, RT2860_RX_BASE_PTR, sc->rxq.paddr);
+	RAL_WRITE(sc, RT2860_RX_MAX_CNT, RT2860_RX_RING_COUNT);
+	RAL_WRITE(sc, RT2860_RX_CALC_IDX, RT2860_RX_RING_COUNT - 1);
+
+	/* setup maximum buffer sizes */
+	RAL_WRITE(sc, RT2860_MAX_LEN_CFG, 1 << 12 |
+	    (MCLBYTES - sizeof (struct rt2860_rxwi) - 2));
+
+	for (ntries = 0; ntries < 100; ntries++) {
+		tmp = RAL_READ(sc, RT2860_WPDMA_GLO_CFG);
+		if ((tmp & (RT2860_TX_DMA_BUSY | RT2860_RX_DMA_BUSY)) == 0)
+			break;
+		DELAY(1000);
+	}
+	if (ntries == 100) {
+		aprint_error_dev(sc->sc_dev,
+		    "timeout waiting for DMA engine\n");
+		rt2860_stop(ifp, 1);
+		return ETIMEDOUT;
+	}
+	tmp &= 0xff0;
+	RAL_WRITE(sc, RT2860_WPDMA_GLO_CFG, tmp);
+
+	/* disable interrupts mitigation */
+	RAL_WRITE(sc, RT2860_DELAY_INT_CFG, 0);
+
+	/* write vendor-specific BBP values (from EEPROM) */
+	for (i = 0; i < 8; i++) {
+		if (sc->bbp[i].reg == 0 || sc->bbp[i].reg == 0xff)
+			continue;
+		rt2860_mcu_bbp_write(sc, sc->bbp[i].reg, sc->bbp[i].val);
+	}
+
+	/* select Main antenna for 1T1R devices */
+	if (sc->rf_rev == RT3070_RF_2020 ||
+	    sc->rf_rev == RT3070_RF_3020 ||
+	    sc->rf_rev == RT3070_RF_3320)
+		rt3090_set_rx_antenna(sc, 0);
+
+	/* send LEDs operating mode to microcontroller */
+	rt2860_mcu_cmd(sc, RT2860_MCU_CMD_LED1, sc->led[0], 0);
+	rt2860_mcu_cmd(sc, RT2860_MCU_CMD_LED2, sc->led[1], 0);
+	rt2860_mcu_cmd(sc, RT2860_MCU_CMD_LED3, sc->led[2], 0);
+
+	if (sc->mac_ver >= 0x3071)
+		rt3090_rf_init(sc);
+
+	rt2860_mcu_cmd(sc, RT2860_MCU_CMD_SLEEP, 0x02ff, 1);
+	rt2860_mcu_cmd(sc, RT2860_MCU_CMD_WAKEUP, 0, 1);
+
+	if (sc->mac_ver >= 0x3071)
+		rt3090_rf_wakeup(sc);
+
+	/* disable non-existing Rx chains */
+	bbp3 = rt2860_mcu_bbp_read(sc, 3);
+	bbp3 &= ~(1 << 3 | 1 << 4);
+	if (sc->nrxchains == 2)
+		bbp3 |= 1 << 3;
+	else if (sc->nrxchains == 3)
+		bbp3 |= 1 << 4;
+	rt2860_mcu_bbp_write(sc, 3, bbp3);
+
+	/* disable non-existing Tx chains */
+	bbp1 = rt2860_mcu_bbp_read(sc, 1);
+	if (sc->ntxchains == 1)
+		bbp1 = (bbp1 & ~(1 << 3 | 1 << 4));
+	else if (sc->mac_ver == 0x3593 && sc->ntxchains == 2)
+		bbp1 = (bbp1 & ~(1 << 4)) | 1 << 3;
+	else if (sc->mac_ver == 0x3593 && sc->ntxchains == 3)
+		bbp1 = (bbp1 & ~(1 << 3)) | 1 << 4;
+	rt2860_mcu_bbp_write(sc, 1, bbp1);
+
+	if (sc->mac_ver >= 0x3071)
+		rt3090_rf_setup(sc);
+
+	/* select default channel */
+	ic->ic_bss->ni_chan = ic->ic_ibss_chan;
+	rt2860_switch_chan(sc, ic->ic_ibss_chan);
+
+	/* reset RF from MCU */
+	rt2860_mcu_cmd(sc, RT2860_MCU_CMD_RFRESET, 0, 0);
+
+	/* set RTS threshold */
+	tmp = RAL_READ(sc, RT2860_TX_RTS_CFG);
+	tmp &= ~0xffff00;
+	tmp |= ic->ic_rtsthreshold << 8;
+	RAL_WRITE(sc, RT2860_TX_RTS_CFG, tmp);
+
+	/* setup initial protection mode */
+	sc->sc_ic_flags = ic->ic_flags;
+	rt2860_updateprot(ic);
+
+	/* turn radio LED on */
+	rt2860_set_leds(sc, RT2860_LED_RADIO);
+
+	/* enable Tx/Rx DMA engine */
+	if ((error = rt2860_txrx_enable(sc)) != 0) {
+		rt2860_stop(ifp, 1);
+		return error;
+	}
+
+	/* clear pending interrupts */
+	RAL_WRITE(sc, RT2860_INT_STATUS, 0xffffffff);
+	/* enable interrupts */
+	RAL_WRITE(sc, RT2860_INT_MASK, 0x3fffc);
+
+	if (sc->sc_flags & RT2860_ADVANCED_PS)
+		rt2860_mcu_cmd(sc, RT2860_MCU_CMD_PSLEVEL, sc->pslevel, 0);
+
+	ifp->if_flags |= IFF_RUNNING;
+	ifp->if_flags &= ~IFF_OACTIVE;
+
+	if (ic->ic_opmode != IEEE80211_M_MONITOR)
+		ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
+	else
+		ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
+
+	return 0;
+}
+
+void
+rt2860_stop(struct ifnet *ifp, int disable)
+{
+	struct rt2860_softc *sc = ifp->if_softc;
+	struct ieee80211com *ic = &sc->sc_ic;
+	uint32_t tmp;
+	int qid;
+
+	if (ifp->if_flags & IFF_RUNNING)
+		rt2860_set_leds(sc, 0);	/* turn all LEDs off */
+
+	sc->sc_tx_timer = 0;
+	ifp->if_timer = 0;
+	ifp->if_flags &= ~IFF_RUNNING;
+	ifp->if_flags &= ~IFF_OACTIVE;
+
+	ieee80211_new_state(ic, IEEE80211_S_INIT, -1);	/* free all nodes */
+
+	/* disable interrupts */
+	RAL_WRITE(sc, RT2860_INT_MASK, 0);
+
+	/* disable GP timer */
+	rt2860_set_gp_timer(sc, 0);
+
+	/* disable Rx */
+	tmp = RAL_READ(sc, RT2860_MAC_SYS_CTRL);
+	tmp &= ~(RT2860_MAC_RX_EN | RT2860_MAC_TX_EN);
+	RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, tmp);
+
+	/* reset adapter */
+	RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, RT2860_BBP_HRST | RT2860_MAC_SRST);
+	RAL_BARRIER_WRITE(sc);
+	RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, 0);
+
+	/* reset Tx and Rx rings (and reclaim TXWIs) */
+	sc->qfullmsk = 0;
+	for (qid = 0; qid < 6; qid++)
+		rt2860_reset_tx_ring(sc, &sc->txq[qid]);
+	rt2860_reset_rx_ring(sc, &sc->rxq);
+
+	/* for CardBus, power down the socket */
+	if (disable && sc->sc_disable != NULL) {
+		if (sc->sc_flags & RT2860_ENABLED) {
+			(*sc->sc_disable)(sc);
+			sc->sc_flags &= ~RT2860_ENABLED;
+		}
+	}
+}
+
+int
+rt2860_load_microcode(struct rt2860_softc *sc)
+{
+	int ntries;
+
+	/* set "host program ram write selection" bit */
+	RAL_WRITE(sc, RT2860_SYS_CTRL, RT2860_HST_PM_SEL);
+	/* write microcode image */
+	RAL_WRITE_REGION_1(sc, RT2860_FW_BASE, sc->ucode, sc->ucsize);
+	/* kick microcontroller unit */
+	RAL_WRITE(sc, RT2860_SYS_CTRL, 0);
+	RAL_BARRIER_WRITE(sc);
+	RAL_WRITE(sc, RT2860_SYS_CTRL, RT2860_MCU_RESET);
+
+	RAL_WRITE(sc, RT2860_H2M_BBPAGENT, 0);
+	RAL_WRITE(sc, RT2860_H2M_MAILBOX, 0);
+
+	/* wait until microcontroller is ready */
+	RAL_BARRIER_READ_WRITE(sc);
+	for (ntries = 0; ntries < 1000; ntries++) {
+		if (RAL_READ(sc, RT2860_SYS_CTRL) & RT2860_MCU_READY)
+			break;
+		DELAY(1000);
+	}
+	if (ntries == 1000) {
+		aprint_error_dev(sc->sc_dev,
+		    "timeout waiting for MCU to initialize\n");
+		return ETIMEDOUT;
+	}
+	return 0;
+}
+
+/*
+ * This function is called periodically to adjust Tx power based on
+ * temperature variation.
+ */
+void
+rt2860_calib(struct rt2860_softc *sc)
+{
+	struct ieee80211com *ic = &sc->sc_ic;
+	const uint8_t *tssi;
+	uint8_t step, bbp49;
+	int8_t ridx, d;
+
+	/* read current temperature */
+	bbp49 = rt2860_mcu_bbp_read(sc, 49);
+
+	if (IEEE80211_IS_CHAN_2GHZ(ic->ic_bss->ni_chan)) {
+		tssi = &sc->tssi_2ghz[4];
+		step = sc->step_2ghz;
+	} else {
+		tssi = &sc->tssi_5ghz[4];
+		step = sc->step_5ghz;
+	}
+
+	if (bbp49 < tssi[0]) {		/* lower than reference */
+		/* use higher Tx power than default */
+		for (d = 0; d > -4 && bbp49 <= tssi[d - 1]; d--);
+	} else if (bbp49 > tssi[0]) {	/* greater than reference */
+		/* use lower Tx power than default */
+		for (d = 0; d < +4 && bbp49 >= tssi[d + 1]; d++);
+	} else {
+		/* use default Tx power */
+		d = 0;
+	}
+	d *= step;
+
+	DPRINTF(("BBP49=0x%02x, adjusting Tx power by %d\n", bbp49, d));
+
+	/* write adjusted Tx power values for each Tx rate */
+	for (ridx = 0; ridx < 5; ridx++) {
+		if (sc->txpow20mhz[ridx] == 0xffffffff)
+			continue;
+		RAL_WRITE(sc, RT2860_TX_PWR_CFG(ridx),
+		    b4inc(sc->txpow20mhz[ridx], d));
+	}
+}
+
+void
+rt3090_set_rx_antenna(struct rt2860_softc *sc, int aux)
+{
+	uint32_t tmp;
+
+	if (aux) {
+		tmp = RAL_READ(sc, RT2860_PCI_EECTRL);
+		RAL_WRITE(sc, RT2860_PCI_EECTRL, tmp & ~RT2860_C);
+		tmp = RAL_READ(sc, RT2860_GPIO_CTRL);
+		RAL_WRITE(sc, RT2860_GPIO_CTRL, (tmp & ~0x0808) | 0x08);
+	} else {
+		tmp = RAL_READ(sc, RT2860_PCI_EECTRL);
+		RAL_WRITE(sc, RT2860_PCI_EECTRL, tmp | RT2860_C);
+		tmp = RAL_READ(sc, RT2860_GPIO_CTRL);
+		RAL_WRITE(sc, RT2860_GPIO_CTRL, tmp & ~0x0808);
+	}
+}
+
+void
+rt2860_switch_chan(struct rt2860_softc *sc, struct ieee80211_channel *c)
+{
+	struct ieee80211com *ic = &sc->sc_ic;
+	u_int chan, group;
+
+	chan = ieee80211_chan2ieee(ic, c);
+	if (chan == 0 || chan == IEEE80211_CHAN_ANY)
+		return;
+
+	if (sc->mac_ver >= 0x3071)
+		rt3090_set_chan(sc, chan);
+	else
+		rt2860_set_chan(sc, chan);
+
+	/* determine channel group */
+	if (chan <= 14)
+		group = 0;
+	else if (chan <= 64)
+		group = 1;
+	else if (chan <= 128)
+		group = 2;
+	else
+		group = 3;
+
+	/* XXX necessary only when group has changed! */
+	rt2860_select_chan_group(sc, group);
+
+	DELAY(1000);
+}
+
+#ifndef IEEE80211_STA_ONLY
+int
+rt2860_setup_beacon(struct rt2860_softc *sc)
+{
+	struct ieee80211com *ic = &sc->sc_ic;
+	struct rt2860_txwi txwi;
+	struct mbuf *m;
+	int ridx;
+
+	if ((m = ieee80211_beacon_alloc(ic, ic->ic_bss, &sc->sc_bo)) == NULL)
+		return ENOBUFS;
+
+	memset(&txwi, 0, sizeof txwi);
+	txwi.wcid = 0xff;
+	txwi.len = htole16(m->m_pkthdr.len);
+	/* send beacons at the lowest available rate */
+	ridx = (ic->ic_curmode == IEEE80211_MODE_11A) ?
+	    RT2860_RIDX_OFDM6 : RT2860_RIDX_CCK1;
+	txwi.phy = htole16(rt2860_rates[ridx].mcs);
+	if (rt2860_rates[ridx].phy == IEEE80211_T_OFDM)
+		txwi.phy |= htole16(RT2860_PHY_OFDM);
+	txwi.txop = RT2860_TX_TXOP_HT;
+	txwi.flags = RT2860_TX_TS;
+	txwi.xflags = RT2860_TX_NSEQ;
+
+	RAL_WRITE_REGION_1(sc, RT2860_BCN_BASE(0),
+	    (uint8_t *)&txwi, sizeof txwi);
+	RAL_WRITE_REGION_1(sc, RT2860_BCN_BASE(0) + sizeof txwi,
+	    mtod(m, uint8_t *), m->m_pkthdr.len);
+
+	m_freem(m);
+
+	return 0;
+}
+#endif
+
+void
+rt2860_enable_tsf_sync(struct rt2860_softc *sc)
+{
+	struct ieee80211com *ic = &sc->sc_ic;
+	uint32_t tmp;
+
+	tmp = RAL_READ(sc, RT2860_BCN_TIME_CFG);
+
+	tmp &= ~0x1fffff;
+	tmp |= ic->ic_bss->ni_intval * 16;
+	tmp |= RT2860_TSF_TIMER_EN | RT2860_TBTT_TIMER_EN;
+	if (ic->ic_opmode == IEEE80211_M_STA) {
+		/*
+		 * Local TSF is always updated with remote TSF on beacon
+		 * reception.
+		 */
+		tmp |= 1 << RT2860_TSF_SYNC_MODE_SHIFT;
+	}
+#ifndef IEEE80211_STA_ONLY
+	else if (ic->ic_opmode == IEEE80211_M_IBSS) {
+		tmp |= RT2860_BCN_TX_EN;
+		/*
+		 * Local TSF is updated with remote TSF on beacon reception
+		 * only if the remote TSF is greater than local TSF.
+		 */
+		tmp |= 2 << RT2860_TSF_SYNC_MODE_SHIFT;
+	} else if (ic->ic_opmode == IEEE80211_M_HOSTAP) {
+		tmp |= RT2860_BCN_TX_EN;
+		/* SYNC with nobody */
+		tmp |= 3 << RT2860_TSF_SYNC_MODE_SHIFT;
+	}
+#endif
+
+	RAL_WRITE(sc, RT2860_BCN_TIME_CFG, tmp);
+}
diff --git a/sys/dev/ic/rt2860var.h b/sys/dev/ic/rt2860var.h
new file mode 100644
index 0000000..c4c5f35
--- /dev/null
+++ b/sys/dev/ic/rt2860var.h
@@ -0,0 +1,209 @@
+/*	$OpenBSD: rt2860var.h,v 1.21 2013/12/06 21:03:03 deraadt Exp $	*/
+
+/*-
+ * Copyright (c) 2007
+ *	Damien Bergamini <damien.bergamini@free.fr>
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#define RT2860_TX_RING_COUNT	64
+#define RT2860_RX_RING_COUNT	128
+#define RT2860_TX_POOL_COUNT	(RT2860_TX_RING_COUNT * 2)
+
+#define RT2860_MAX_SCATTER	((RT2860_TX_RING_COUNT * 2) - 1)
+
+/* HW supports up to 255 STAs */
+#define RT2860_WCID_MAX		254
+#define RT2860_AID2WCID(aid)	((aid) & 0xff)
+
+#define IEEE80211_NO_HT
+
+struct rt2860_rx_radiotap_header {
+	struct ieee80211_radiotap_header wr_ihdr;
+	uint8_t		wr_flags;
+	uint8_t		wr_rate;
+	uint16_t	wr_chan_freq;
+	uint16_t	wr_chan_flags;
+	uint8_t		wr_dbm_antsignal;
+	uint8_t		wr_antenna;
+	uint8_t		wr_antsignal;
+} __packed;
+
+#define RT2860_RX_RADIOTAP_PRESENT			\
+	(1 << IEEE80211_RADIOTAP_FLAGS |		\
+	 1 << IEEE80211_RADIOTAP_RATE |			\
+	 1 << IEEE80211_RADIOTAP_CHANNEL |		\
+	 1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL |	\
+	 1 << IEEE80211_RADIOTAP_ANTENNA |		\
+	 1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL)
+
+struct rt2860_tx_radiotap_header {
+	struct ieee80211_radiotap_header wt_ihdr;
+	uint8_t		wt_flags;
+	uint8_t		wt_rate;
+	uint16_t	wt_chan_freq;
+	uint16_t	wt_chan_flags;
+	uint8_t		wt_hwqueue;
+} __packed;
+
+#define RT2860_TX_RADIOTAP_PRESENT			\
+	(1 << IEEE80211_RADIOTAP_FLAGS |		\
+	 1 << IEEE80211_RADIOTAP_RATE |			\
+	 1 << IEEE80211_RADIOTAP_CHANNEL)
+
+struct rt2860_tx_data {
+	struct rt2860_txwi		*txwi;
+	struct mbuf			*m;
+	struct ieee80211_node		*ni;
+	bus_dmamap_t			map;
+	bus_addr_t			paddr;
+	SLIST_ENTRY(rt2860_tx_data)	next;
+};
+
+struct rt2860_tx_ring {
+	struct rt2860_txd	*txd;
+	bus_addr_t		paddr;
+	bus_dmamap_t		map;
+	bus_dma_segment_t	seg;
+	struct rt2860_tx_data	*data[RT2860_TX_RING_COUNT];
+	int			cur;
+	int			next;
+	int			queued;
+};
+
+struct rt2860_rx_data {
+	struct mbuf	*m;
+	bus_dmamap_t	map;
+};
+
+struct rt2860_rx_ring {
+	struct rt2860_rxd	*rxd;
+	bus_addr_t		paddr;
+	bus_dmamap_t		map;
+	bus_dma_segment_t	seg;
+	unsigned int		cur;	/* must be unsigned */
+	struct rt2860_rx_data	data[RT2860_RX_RING_COUNT];
+};
+
+struct rt2860_node {
+	struct ieee80211_node	ni;
+	uint8_t			wcid;
+	uint8_t			ridx[IEEE80211_RATE_MAXSIZE];
+	uint8_t			ctl_ridx[IEEE80211_RATE_MAXSIZE];
+};
+
+struct rt2860_softc {
+	device_t			sc_dev;
+	struct ethercom			sc_ec;
+#define sc_if  sc_ec.ec_if
+
+	struct ieee80211com		sc_ic;
+	int				(*sc_newstate)(struct ieee80211com *,
+					    enum ieee80211_state, int);
+	struct ieee80211_amrr		amrr;
+
+	int				(*sc_enable)(struct rt2860_softc *);
+	void				(*sc_disable)(struct rt2860_softc *);
+
+	bus_dma_tag_t			sc_dmat;
+	bus_space_tag_t			sc_st;
+	bus_space_handle_t		sc_sh;
+
+	uint16_t			(*sc_srom_read)(struct rt2860_softc *,
+					    uint16_t);
+
+	int				sc_flags;
+#define RT2860_ENABLED		(1 << 0)
+#define RT2860_ADVANCED_PS	(1 << 1)
+#define RT2860_PCIE		(1 << 2)
+
+	uint32_t			sc_ic_flags;
+	int				fixed_ridx;
+
+	u_char				*ucode;
+	size_t				ucsize;
+
+	struct rt2860_tx_ring		txq[6];
+	struct rt2860_rx_ring		rxq;
+
+	SLIST_HEAD(, rt2860_tx_data)	data_pool;
+	struct rt2860_tx_data		data[RT2860_TX_POOL_COUNT];
+	bus_dmamap_t			txwi_map;
+	bus_dma_segment_t		txwi_seg;
+	void				*txwi_vaddr;
+
+	int				sc_tx_timer;
+	struct ieee80211_beacon_offsets	sc_bo;
+	int				mgtqid;
+	uint8_t				qfullmsk;
+
+	uint16_t			mac_ver;
+	uint16_t			mac_rev;
+	uint8_t				rf_rev;
+	uint8_t				freq;
+	uint8_t				ntxchains;
+	uint8_t				nrxchains;
+	uint8_t				pslevel;
+	int8_t				txpow1[54];
+	int8_t				txpow2[54];
+	int8_t				rssi_2ghz[3];
+	int8_t				rssi_5ghz[3];
+	uint8_t				lna[4];
+	uint8_t				rf24_20mhz;
+	uint8_t				rf24_40mhz;
+	uint8_t				patch_dac;
+	uint8_t				rfswitch;
+	uint8_t				ext_2ghz_lna;
+	uint8_t				ext_5ghz_lna;
+	uint8_t				calib_2ghz;
+	uint8_t				calib_5ghz;
+	uint8_t				txmixgain_2ghz;
+	uint8_t				txmixgain_5ghz;
+	uint8_t				tssi_2ghz[9];
+	uint8_t				tssi_5ghz[9];
+	uint8_t				step_2ghz;
+	uint8_t				step_5ghz;
+	struct {
+		uint8_t	reg;
+		uint8_t	val;
+	}				bbp[8], rf[10];
+	uint8_t				leds;
+	uint16_t			led[3];
+	uint32_t			txpow20mhz[5];
+	uint32_t			txpow40mhz_2ghz[5];
+	uint32_t			txpow40mhz_5ghz[5];
+
+	struct ieee80211_amrr_node	amn[RT2860_WCID_MAX + 1];
+
+	struct bpf_if			*sc_drvbpf;
+	union {
+		struct rt2860_rx_radiotap_header th;
+		uint8_t pad[64];
+	}				sc_rxtapu;
+#define sc_rxtap			sc_rxtapu.th
+	int				sc_rxtap_len;
+
+	union {
+		struct rt2860_tx_radiotap_header th;
+		uint8_t pad[64];
+	}				sc_txtapu;
+#define sc_txtap			sc_txtapu.th
+	int				sc_txtap_len;
+};
+
+int	rt2860_attach(void *, int);
+int	rt2860_detach(void *);
+void	rt2860_suspend(void *);
+void	rt2860_wakeup(void *);
+int	rt2860_intr(void *);
diff --git a/sys/dev/pci/if_ral_pci.c b/sys/dev/pci/if_ral_pci.c
index 86316d7..1f73a08 100644
--- a/sys/dev/pci/if_ral_pci.c
+++ b/sys/dev/pci/if_ral_pci.c
@@ -51,6 +51,7 @@ __KERNEL_RCSID(0, "$NetBSD: if_ral_pci.c,v 1.21 2014/03/29 19:28:25 christos Exp
 
 #include <dev/ic/rt2560var.h>
 #include <dev/ic/rt2661var.h>
+#include <dev/ic/rt2860var.h>
 
 #include <dev/pci/pcireg.h>
 #include <dev/pci/pcivar.h>
@@ -70,12 +71,18 @@ static struct ral_opns {
 	rt2661_attach,
 	rt2661_detach,
 	rt2661_intr
+
+}, ral_rt2860_opns = {
+	rt2860_attach,
+	rt2860_detach,
+	rt2860_intr
 };
 
 struct ral_pci_softc {
 	union {
 		struct rt2560_softc	sc_rt2560;
 		struct rt2661_softc	sc_rt2661;
+		struct rt2860_softc	sc_rt2860;
 	} u;
 #define sc_sc	u.sc_rt2560
 
@@ -108,6 +115,7 @@ ral_pci_match(device_t parent, cfdata_t cfdata,
 			case PCI_PRODUCT_RALINK_RT2561:
 			case PCI_PRODUCT_RALINK_RT2561S:
 			case PCI_PRODUCT_RALINK_RT2661:
+			case PCI_PRODUCT_RALINK_RT5390:
 				return 1;
 			default:
 				return 0;
@@ -126,7 +134,7 @@ ral_pci_attach(device_t parent, device_t self, void *aux)
 	const char *intrstr;
 	bus_addr_t base;
 	pci_intr_handle_t ih;
-	pcireg_t reg;
+	pcireg_t memtype, reg;
 	int error;
 	char intrbuf[PCI_INTRSTR_LEN];
 
@@ -134,6 +142,24 @@ ral_pci_attach(device_t parent, device_t self, void *aux)
 
 	psc->sc_opns = (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_RALINK_RT2560) ?
 	    &ral_rt2560_opns : &ral_rt2661_opns;
+	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_RALINK) {
+		switch (PCI_PRODUCT(pa->pa_id)) {
+		case PCI_PRODUCT_RALINK_RT2560:
+			psc->sc_opns = &ral_rt2560_opns;
+			break;
+		case PCI_PRODUCT_RALINK_RT2561:
+		case PCI_PRODUCT_RALINK_RT2561S:
+		case PCI_PRODUCT_RALINK_RT2661:
+			psc->sc_opns = &ral_rt2661_opns;
+			break;
+		default:
+			psc->sc_opns = &ral_rt2860_opns;
+			break;
+		}
+	} else {
+		/* all other vendors are RT2860 only */
+		psc->sc_opns = &ral_rt2860_opns;
+	}
 
 	sc->sc_dev = self;
 	sc->sc_dmat = pa->pa_dmat;
@@ -145,9 +171,9 @@ ral_pci_attach(device_t parent, device_t self, void *aux)
 	pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg);
 
 	/* map control/status registers */
-	error = pci_mapreg_map(pa, RAL_PCI_BAR0, PCI_MAPREG_TYPE_MEM |
-	    PCI_MAPREG_MEM_TYPE_32BIT, 0, &sc->sc_st, &sc->sc_sh, &base,
-	    &psc->sc_mapsize);
+	memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, RAL_PCI_BAR0);
+	error = pci_mapreg_map(pa, RAL_PCI_BAR0, memtype, 0, &sc->sc_st,
+	    &sc->sc_sh, &base, &psc->sc_mapsize);
 
 	if (error != 0) {
 		aprint_error(": could not map memory space\n");
-- 
2.5.2


From f165141179d4b4f78a275a3cff108090c3609d4c Mon Sep 17 00:00:00 2001
From: Jeff Rizzo <riz@tastylime.net>
Date: Sun, 20 Dec 2015 08:41:09 -0800
Subject: [PATCH 10/18] Remove old option setting.

---
 sys/dev/pci/if_ral_pci.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/sys/dev/pci/if_ral_pci.c b/sys/dev/pci/if_ral_pci.c
index 1f73a08..56fc3a1 100644
--- a/sys/dev/pci/if_ral_pci.c
+++ b/sys/dev/pci/if_ral_pci.c
@@ -140,8 +140,6 @@ ral_pci_attach(device_t parent, device_t self, void *aux)
 
 	pci_aprint_devinfo(pa, NULL);
 
-	psc->sc_opns = (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_RALINK_RT2560) ?
-	    &ral_rt2560_opns : &ral_rt2661_opns;
 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_RALINK) {
 		switch (PCI_PRODUCT(pa->pa_id)) {
 		case PCI_PRODUCT_RALINK_RT2560:
-- 
2.5.2


From f62ef2cd543f45382f75c6c64f88d65614c81c49 Mon Sep 17 00:00:00 2001
From: Jeff Rizzo <riz@tastylime.net>
Date: Sun, 20 Dec 2015 09:02:45 -0800
Subject: [PATCH 11/18] Rearrange rt2860_softc so bus handles are in the same
 place as other ral(4).

---
 sys/dev/ic/rt2860var.h | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/sys/dev/ic/rt2860var.h b/sys/dev/ic/rt2860var.h
index c4c5f35..0c352de 100644
--- a/sys/dev/ic/rt2860var.h
+++ b/sys/dev/ic/rt2860var.h
@@ -105,13 +105,10 @@ struct rt2860_node {
 
 struct rt2860_softc {
 	device_t			sc_dev;
-	struct ethercom			sc_ec;
-#define sc_if  sc_ec.ec_if
 
 	struct ieee80211com		sc_ic;
 	int				(*sc_newstate)(struct ieee80211com *,
 					    enum ieee80211_state, int);
-	struct ieee80211_amrr		amrr;
 
 	int				(*sc_enable)(struct rt2860_softc *);
 	void				(*sc_disable)(struct rt2860_softc *);
@@ -120,6 +117,9 @@ struct rt2860_softc {
 	bus_space_tag_t			sc_st;
 	bus_space_handle_t		sc_sh;
 
+	struct ethercom			sc_ec;
+#define sc_if  sc_ec.ec_if
+
 	uint16_t			(*sc_srom_read)(struct rt2860_softc *,
 					    uint16_t);
 
@@ -128,6 +128,8 @@ struct rt2860_softc {
 #define RT2860_ADVANCED_PS	(1 << 1)
 #define RT2860_PCIE		(1 << 2)
 
+	struct ieee80211_amrr		amrr;
+
 	uint32_t			sc_ic_flags;
 	int				fixed_ridx;
 
-- 
2.5.2


From 50b0dc23e4efa5856970b6ff4e4b3a170cffb4dc Mon Sep 17 00:00:00 2001
From: Jeff Rizzo <riz@tastylime.net>
Date: Sun, 20 Dec 2015 09:35:13 -0800
Subject: [PATCH 12/18] set ic_ifp so that ether_ifattach() can succeed.

Also, remove a stray NBPFILTER section
---
 sys/dev/ic/rt2860.c | 12 ++----------
 1 file changed, 2 insertions(+), 10 deletions(-)

diff --git a/sys/dev/ic/rt2860.c b/sys/dev/ic/rt2860.c
index 3ac2f7d..83562fb 100644
--- a/sys/dev/ic/rt2860.c
+++ b/sys/dev/ic/rt2860.c
@@ -307,6 +307,7 @@ rt2860_attachhook(struct device *self)
 		return;
 	}
 
+	ic->ic_ifp = ifp;
 	ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
 	ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
 	ic->ic_state = IEEE80211_S_INIT;
@@ -1589,10 +1590,8 @@ rt2860_tx(struct rt2860_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
 		txwi->flags |= RT2860_TX_TS;
 #endif
 
-#if NBPFILTER > 0
 	if (__predict_false(sc->sc_drvbpf != NULL)) {
 		struct rt2860_tx_radiotap_header *tap = &sc->sc_txtap;
-		struct mbuf mb;
 
 		tap->wt_flags = 0;
 		tap->wt_rate = rt2860_rates[ridx].rate;
@@ -1602,15 +1601,8 @@ rt2860_tx(struct rt2860_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
 		if (mcs & RT2860_PHY_SHPRE)
 			tap->wt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
 
-		mb.m_data = (void *)tap;
-		mb.m_len = sc->sc_txtap_len;
-		mb.m_next = m;
-		mb.m_nextpkt = NULL;
-		mb.m_type = 0;
-		mb.m_flags = 0;
-		bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT);
+		bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m);
 	}
-#endif
 
 	/* copy and trim 802.11 header */
 	memcpy(txwi + 1, wh, hdrlen);
-- 
2.5.2


From 69b42865e2c8194628a51d51b4a192be092940bb Mon Sep 17 00:00:00 2001
From: Jeff Rizzo <riz@tastylime.net>
Date: Sun, 20 Dec 2015 10:51:04 -0800
Subject: [PATCH 13/18] rt2860: set if_init, and fix up rt2860_ioctl().

---
 sys/dev/ic/rt2860.c | 23 ++++++++++++++---------
 1 file changed, 14 insertions(+), 9 deletions(-)

diff --git a/sys/dev/ic/rt2860.c b/sys/dev/ic/rt2860.c
index 83562fb..5c5e7d7 100644
--- a/sys/dev/ic/rt2860.c
+++ b/sys/dev/ic/rt2860.c
@@ -357,6 +357,7 @@ rt2860_attachhook(struct device *self)
 
 	ifp->if_softc = sc;
 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
+	ifp->if_init = rt2860_init;
 	ifp->if_ioctl = rt2860_ioctl;
 	ifp->if_start = rt2860_start;
 	ifp->if_watchdog = rt2860_watchdog;
@@ -1823,16 +1824,20 @@ rt2860_ioctl(struct ifnet *ifp, u_long cmd, void *data)
 	s = splnet();
 
 	switch (cmd) {
-	case SIOCSIFADDR:
-		ifp->if_flags |= IFF_UP;
-		/* FALLTHROUGH */
 	case SIOCSIFFLAGS:
-		if (ifp->if_flags & IFF_UP) {
-			if (!(ifp->if_flags & IFF_RUNNING))
-				rt2860_init(ifp);
-		} else {
-			if (ifp->if_flags & IFF_RUNNING)
-				rt2860_stop(ifp, 1);
+		if ((error = ifioctl_common(ifp, cmd, data)) != 0)
+			break;
+		switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) {
+		case IFF_UP|IFF_RUNNING:
+			break;
+		case IFF_UP:
+			rt2860_init(ifp);
+			break;
+		case IFF_RUNNING:
+			rt2860_stop(ifp, 1);
+			break;
+		case 0:
+			break;
 		}
 		break;
 
-- 
2.5.2


From 55db9673e4e521d7955fd15f925f40813a35c22d Mon Sep 17 00:00:00 2001
From: Jeff Rizzo <riz@tastylime.net>
Date: Sun, 20 Dec 2015 14:45:35 -0800
Subject: [PATCH 14/18] Add a print for every function.  Hasn't helped much,
 yet...

---
 sys/dev/ic/rt2860.c | 74 ++++++++++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 73 insertions(+), 1 deletion(-)

diff --git a/sys/dev/ic/rt2860.c b/sys/dev/ic/rt2860.c
index 5c5e7d7..12cf29d 100644
--- a/sys/dev/ic/rt2860.c
+++ b/sys/dev/ic/rt2860.c
@@ -199,7 +199,7 @@ rt2860_attach(void *xsc, int id)
 	int qid, ntries, error;
 	uint32_t tmp;
 
-	aprint_normal_dev(sc->sc_dev, "in rt2860_attach()\n");
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	sc->amrr.amrr_min_success_threshold =  1;
 	sc->amrr.amrr_max_success_threshold = 15;
 
@@ -277,6 +277,7 @@ firmware_load(const char *dname, const char *iname, uint8_t **ucodep,
 	firmware_handle_t fh;
 	int error;
 
+	aprint_normal("in %s\n", __FUNCTION__);
 	if ((error = firmware_open(dname, iname, &fh)) != 0)
 		return (error);
 	*sizep = firmware_get_size(fh);
@@ -299,6 +300,7 @@ rt2860_attachhook(struct device *self)
 	struct ifnet *ifp = &sc->sc_if;
 	int i, error;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	error = firmware_load("ral", "ral-rt2860", &sc->ucode, &sc->ucsize);
 	if (error != 0) {
 		aprint_error_dev(sc->sc_dev,
@@ -400,6 +402,7 @@ rt2860_detach(void *xsc)
 	struct ifnet *ifp = &sc->sc_if;
 	int qid;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	ieee80211_ifdetach(&sc->sc_ic);	/* free all nodes */
 	if_detach(ifp);
 
@@ -420,6 +423,7 @@ rt2860_suspend(void *xsc)
 	struct rt2860_softc *sc = xsc;
 	struct ifnet *ifp = &sc->sc_if;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	if (ifp->if_flags & IFF_RUNNING)
 		rt2860_stop(ifp, 1);
 }
@@ -430,6 +434,7 @@ rt2860_wakeup(void *xsc)
 	struct rt2860_softc *sc = xsc;
 	struct ifnet *ifp = &sc->sc_if;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	if (ifp->if_flags & IFF_UP)
 		rt2860_init(ifp);
 }
@@ -439,6 +444,7 @@ rt2860_alloc_tx_ring(struct rt2860_softc *sc, struct rt2860_tx_ring *ring)
 {
 	int nsegs, size, error;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	size = RT2860_TX_RING_COUNT * sizeof (struct rt2860_txd);
 
 	error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
@@ -487,6 +493,7 @@ rt2860_reset_tx_ring(struct rt2860_softc *sc, struct rt2860_tx_ring *ring)
 	struct rt2860_tx_data *data;
 	int i;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	for (i = 0; i < RT2860_TX_RING_COUNT; i++) {
 		if ((data = ring->data[i]) == NULL)
 			continue;	/* nothing mapped in this slot */
@@ -512,6 +519,7 @@ rt2860_free_tx_ring(struct rt2860_softc *sc, struct rt2860_tx_ring *ring)
 	struct rt2860_tx_data *data;
 	int i;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	if (ring->txd != NULL) {
 		bus_dmamap_sync(sc->sc_dmat, ring->map, 0,
 		    ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
@@ -546,6 +554,7 @@ rt2860_alloc_tx_pool(struct rt2860_softc *sc)
 	bus_addr_t paddr;
 	int i, nsegs, size, error;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	size = RT2860_TX_POOL_COUNT * RT2860_TXWI_DMASZ;
 
 	/* init data_pool early in case of failure.. */
@@ -613,6 +622,7 @@ fail:	rt2860_free_tx_pool(sc);
 void
 rt2860_free_tx_pool(struct rt2860_softc *sc)
 {
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	if (sc->txwi_vaddr != NULL) {
 		bus_dmamap_sync(sc->sc_dmat, sc->txwi_map, 0,
 		    sc->txwi_map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
@@ -637,6 +647,7 @@ rt2860_alloc_rx_ring(struct rt2860_softc *sc, struct rt2860_rx_ring *ring)
 {
 	int i, nsegs, size, error;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	size = RT2860_RX_RING_COUNT * sizeof (struct rt2860_rxd);
 
 	error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
@@ -725,6 +736,7 @@ rt2860_reset_rx_ring(struct rt2860_softc *sc, struct rt2860_rx_ring *ring)
 {
 	int i;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	for (i = 0; i < RT2860_RX_RING_COUNT; i++)
 		ring->rxd[i].sdl0 &= ~htole16(RT2860_RX_DDONE);
 
@@ -739,6 +751,7 @@ rt2860_free_rx_ring(struct rt2860_softc *sc, struct rt2860_rx_ring *ring)
 {
 	int i;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	if (ring->rxd != NULL) {
 		bus_dmamap_sync(sc->sc_dmat, ring->map, 0,
 		    ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
@@ -767,6 +780,7 @@ rt2860_free_rx_ring(struct rt2860_softc *sc, struct rt2860_rx_ring *ring)
 struct ieee80211_node *
 rt2860_node_alloc(struct ieee80211_node_table *nt)
 {
+	aprint_normal("in %s\n", __FUNCTION__);
 	struct rt2860_node *rn = 
 	    malloc(sizeof (struct rt2860_node), M_DEVBUF, M_NOWAIT | M_ZERO);
 	return (rn) ? &rn->ni : NULL;
@@ -780,6 +794,7 @@ rt2860_media_change(struct ifnet *ifp)
 	uint8_t rate, ridx;
 	int error;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	error = ieee80211_media_change(ifp);
 	if (error != ENETRESET)
 		return error;
@@ -807,6 +822,7 @@ rt2860_iter_func(void *arg, struct ieee80211_node *ni)
 	struct rt2860_softc *sc = arg;
 	uint8_t wcid = ((struct rt2860_node *)ni)->wcid;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	ieee80211_amrr_choose(&sc->amrr, ni, &sc->amn[wcid]);
 }
 
@@ -815,6 +831,7 @@ rt2860_updatestats(struct rt2860_softc *sc)
 {
 	struct ieee80211com *ic = &sc->sc_ic;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 #ifndef IEEE80211_STA_ONLY
 	/*
 	 * In IBSS or HostAP modes (when the hardware sends beacons), the
@@ -853,6 +870,7 @@ rt2860_newassoc(struct ieee80211_node *ni, int isnew)
 	uint8_t rate, wcid = 0;
 	int ridx, i, j;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	if (isnew && ni->ni_associd != 0) {
 		/* only interested in true associations */
 		wcid = rn->wcid = IEEE80211_AID(ni->ni_associd);
@@ -898,6 +916,7 @@ int
 rt2860_ampdu_rx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
     uint8_t tid)
 {
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	struct rt2860_softc *sc = ic->ic_softc;
 	uint8_t wcid = ((struct rt2860_node *)ni)->wcid;
 	uint32_t tmp;
@@ -913,6 +932,7 @@ void
 rt2860_ampdu_rx_stop(struct ieee80211com *ic, struct ieee80211_node *ni,
     uint8_t tid)
 {
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	struct rt2860_softc *sc = ic->ic_softc;
 	uint8_t wcid = ((struct rt2860_node *)ni)->wcid;
 	uint32_t tmp;
@@ -931,6 +951,7 @@ rt2860_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
 	enum ieee80211_state ostate;
 	uint32_t tmp;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	ostate = ic->ic_state;
 
 	if (ostate == IEEE80211_S_RUN) {
@@ -1050,6 +1071,7 @@ rt2860_eeprom_read_2(struct rt2860_softc *sc, uint16_t addr)
 	uint16_t val;
 	int n;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	/* clock C once before the first command */
 	RT2860_EEPROM_CTL(sc, 0);
 
@@ -1100,6 +1122,7 @@ rt2860_eeprom_read_2(struct rt2860_softc *sc, uint16_t addr)
 static __inline uint16_t
 rt2860_srom_read(struct rt2860_softc *sc, uint8_t addr)
 {
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	/* either eFUSE ROM or EEPROM */
 	return sc->sc_srom_read(sc, addr);
 }
@@ -1109,6 +1132,7 @@ rt2860_intr_coherent(struct rt2860_softc *sc)
 {
 	uint32_t tmp;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	/* DMA finds data coherent event when checking the DDONE bit */
 
 	DPRINTF(("Tx/Rx Coherent interrupt\n"));
@@ -1129,6 +1153,7 @@ rt2860_drain_stats_fifo(struct rt2860_softc *sc)
 	uint32_t stat;
 	uint8_t wcid, mcs, pid;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	/* drain Tx status FIFO (maxsize = 16) */
 	while ((stat = RAL_READ(sc, RT2860_TX_STAT_FIFO)) & RT2860_TXQ_VLD) {
 		DPRINTFN(4, ("tx stat 0x%08x\n", stat));
@@ -1167,6 +1192,7 @@ rt2860_tx_intr(struct rt2860_softc *sc, int qid)
 	struct rt2860_tx_ring *ring = &sc->txq[qid];
 	uint32_t hw;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	rt2860_drain_stats_fifo(sc);
 
 	hw = RAL_READ(sc, RT2860_TX_DTX_IDX(qid));
@@ -1205,6 +1231,7 @@ rt2860_maxrssi_chain(struct rt2860_softc *sc, const struct rt2860_rxwi *rxwi)
 {
 	uint8_t rxchain = 0;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	if (sc->nrxchains > 1) {
 		if (rxwi->rssi[1] > rxwi->rssi[rxchain])
 			rxchain = 1;
@@ -1229,6 +1256,7 @@ rt2860_rx_intr(struct rt2860_softc *sc)
 	struct rt2860_rx_radiotap_header *tap;
 	uint16_t phy;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	hw = RAL_READ(sc, RT2860_FS_DRX_IDX) & 0xfff;
 	while (sc->rxq.cur != hw) {
 		struct rt2860_rx_data *data = &sc->rxq.data[sc->rxq.cur];
@@ -1391,6 +1419,7 @@ rt2860_tbtt_intr(struct rt2860_softc *sc)
 {
 	struct ieee80211com *ic = &sc->sc_ic;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 #ifndef IEEE80211_STA_ONLY
 	if (ic->ic_opmode == IEEE80211_M_HOSTAP) {
 		/* one less beacon until next DTIM */
@@ -1421,6 +1450,7 @@ rt2860_gp_intr(struct rt2860_softc *sc)
 {
 	struct ieee80211com *ic = &sc->sc_ic;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	DPRINTFN(2, ("GP timeout state=%d\n", ic->ic_state));
 
 	if (ic->ic_state == IEEE80211_S_SCAN)
@@ -1500,6 +1530,7 @@ rt2860_tx(struct rt2860_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
 	uint8_t type, qsel, mcs, pid, tid, qid;
 	int nsegs, ntxds, hasqos, ridx, ctl_ridx, error;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	/* the data pool contains at least one element, pick the first */
 	data = SLIST_FIRST(&sc->data_pool);
 
@@ -1735,6 +1766,7 @@ rt2860_start(struct ifnet *ifp)
 	struct ieee80211_node *ni;
 	struct mbuf *m;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
 		return;
 
@@ -1798,6 +1830,7 @@ rt2860_watchdog(struct ifnet *ifp)
 	struct rt2860_softc *sc = ifp->if_softc;
 	struct ieee80211com *ic = &sc->sc_ic;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	ifp->if_timer = 0;
 
 	if (sc->sc_tx_timer > 0) {
@@ -1821,6 +1854,7 @@ rt2860_ioctl(struct ifnet *ifp, u_long cmd, void *data)
 	struct ieee80211com *ic = &sc->sc_ic;
 	int s, error = 0;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	s = splnet();
 
 	switch (cmd) {
@@ -1877,6 +1911,7 @@ rt2860_mcu_bbp_write(struct rt2860_softc *sc, uint8_t reg, uint8_t val)
 {
 	int ntries;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	for (ntries = 0; ntries < 100; ntries++) {
 		if (!(RAL_READ(sc, RT2860_H2M_BBPAGENT) & RT2860_BBP_CSR_KICK))
 			break;
@@ -1902,6 +1937,7 @@ rt2860_mcu_bbp_read(struct rt2860_softc *sc, uint8_t reg)
 	uint32_t val;
 	int ntries;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	for (ntries = 0; ntries < 100; ntries++) {
 		if (!(RAL_READ(sc, RT2860_H2M_BBPAGENT) & RT2860_BBP_CSR_KICK))
 			break;
@@ -1940,6 +1976,7 @@ rt2860_rf_write(struct rt2860_softc *sc, uint8_t reg, uint32_t val)
 	uint32_t tmp;
 	int ntries;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	for (ntries = 0; ntries < 100; ntries++) {
 		if (!(RAL_READ(sc, RT2860_RF_CSR_CFG0) & RT2860_RF_REG_CTRL))
 			break;
@@ -1962,6 +1999,7 @@ rt3090_rf_read(struct rt2860_softc *sc, uint8_t reg)
 	uint32_t tmp;
 	int ntries;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	for (ntries = 0; ntries < 100; ntries++) {
 		if (!(RAL_READ(sc, RT3070_RF_CSR_CFG) & RT3070_RF_KICK))
 			break;
@@ -2017,6 +2055,7 @@ rt2860_mcu_cmd(struct rt2860_softc *sc, uint8_t cmd, uint16_t arg, int wait)
 	uint32_t tmp;
 	uint8_t cid;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	for (ntries = 0; ntries < 100; ntries++) {
 		if (!(RAL_READ(sc, RT2860_H2M_MAILBOX) & RT2860_H2M_BUSY))
 			break;
@@ -2063,6 +2102,7 @@ rt2860_mcu_cmd(struct rt2860_softc *sc, uint8_t cmd, uint16_t arg, int wait)
 void
 rt2860_enable_mrr(struct rt2860_softc *sc)
 {
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 #define CCK(mcs)	(mcs)
 #define OFDM(mcs)	(1 << 3 | (mcs))
 	RAL_WRITE(sc, RT2860_LG_FBK_CFG0,
@@ -2089,6 +2129,7 @@ rt2860_set_txpreamble(struct rt2860_softc *sc)
 {
 	uint32_t tmp;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	tmp = RAL_READ(sc, RT2860_AUTO_RSP_CFG);
 	tmp &= ~RT2860_CCK_SHORT_EN;
 	if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE)
@@ -2101,6 +2142,7 @@ rt2860_set_basicrates(struct rt2860_softc *sc)
 {
 	struct ieee80211com *ic = &sc->sc_ic;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	/* set basic rates mask */
 	if (ic->ic_curmode == IEEE80211_MODE_11B)
 		RAL_WRITE(sc, RT2860_LEGACY_BASIC_RATE, 0x003);
@@ -2116,6 +2158,7 @@ rt2860_select_chan_group(struct rt2860_softc *sc, int group)
 	uint32_t tmp;
 	uint8_t agc;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	rt2860_mcu_bbp_write(sc, 62, 0x37 - sc->lna[group]);
 	rt2860_mcu_bbp_write(sc, 63, 0x37 - sc->lna[group]);
 	rt2860_mcu_bbp_write(sc, 64, 0x37 - sc->lna[group]);
@@ -2212,6 +2255,7 @@ rt2860_set_chan(struct rt2860_softc *sc, u_int chan)
 	int8_t txpow1, txpow2;
 	u_int i;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	/* find the settings for this channel (we know it exists) */
 	for (i = 0; rfprog[i].chan != chan; i++);
 
@@ -2266,6 +2310,7 @@ rt3090_set_chan(struct rt2860_softc *sc, u_int chan)
 	uint8_t rf;
 	int i;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	KASSERT(chan >= 1 && chan <= 14);	/* RT3090 is 2GHz only */
 
 	/* find the settings for this channel (we know it exists) */
@@ -2330,6 +2375,7 @@ rt3090_rf_init(struct rt2860_softc *sc)
 	uint8_t rf, bbp;
 	int i;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	rf = rt3090_rf_read(sc, 30);
 	/* toggle RF R30 bit 7 */
 	rt3090_rf_write(sc, 30, rf | 0x80);
@@ -2444,6 +2490,7 @@ rt3090_rf_wakeup(struct rt2860_softc *sc)
 	uint32_t tmp;
 	uint8_t rf;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	if (sc->mac_ver == 0x3593) {
 		/* enable VCO */
 		rf = rt3090_rf_read(sc, 1);
@@ -2512,6 +2559,7 @@ rt3090_filter_calib(struct rt2860_softc *sc, uint8_t init, uint8_t target,
 	uint8_t bbp55_pb, bbp55_sb, delta;
 	int ntries;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	/* program filter */
 	rf24 = rt3090_rf_read(sc, 24);
 	rf24 = (rf24 & 0xc0) | init;	/* initial filter value */
@@ -2575,6 +2623,7 @@ rt3090_rf_setup(struct rt2860_softc *sc)
 	uint8_t bbp;
 	int i;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	if (sc->mac_rev >= 0x0211) {
 		/* enable DC filter */
 		rt2860_mcu_bbp_write(sc, 103, 0xc0);
@@ -2602,6 +2651,7 @@ rt3090_rf_setup(struct rt2860_softc *sc)
 void
 rt2860_set_leds(struct rt2860_softc *sc, uint16_t which)
 {
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	rt2860_mcu_cmd(sc, RT2860_MCU_CMD_LEDS,
 	    which | (sc->leds & 0x7f), 0);
 }
@@ -2615,6 +2665,7 @@ rt2860_set_gp_timer(struct rt2860_softc *sc, int ms)
 {
 	uint32_t tmp;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	/* disable GP timer before reprogramming it */
 	tmp = RAL_READ(sc, RT2860_INT_TIMER_EN);
 	RAL_WRITE(sc, RT2860_INT_TIMER_EN, tmp & ~RT2860_GP_TIMER_EN);
@@ -2635,6 +2686,7 @@ rt2860_set_gp_timer(struct rt2860_softc *sc, int ms)
 void
 rt2860_set_bssid(struct rt2860_softc *sc, const uint8_t *bssid)
 {
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	RAL_WRITE(sc, RT2860_MAC_BSSID_DW0,
 	    bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24);
 	RAL_WRITE(sc, RT2860_MAC_BSSID_DW1,
@@ -2644,6 +2696,7 @@ rt2860_set_bssid(struct rt2860_softc *sc, const uint8_t *bssid)
 void
 rt2860_set_macaddr(struct rt2860_softc *sc, const uint8_t *addr)
 {
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	RAL_WRITE(sc, RT2860_MAC_ADDR_DW0,
 	    addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24);
 	RAL_WRITE(sc, RT2860_MAC_ADDR_DW1,
@@ -2657,6 +2710,7 @@ rt2860_updateslot(struct ifnet *ifp)
 	struct ieee80211com *ic = &sc->sc_ic;
 	uint32_t tmp;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	tmp = RAL_READ(sc, RT2860_BKOFF_SLOT_CFG);
 	tmp &= ~0xff;
 	tmp |= (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
@@ -2669,6 +2723,7 @@ rt2860_updateprot(struct ieee80211com *ic)
 	struct rt2860_softc *sc = ic->ic_ifp->if_softc;
 	uint32_t tmp;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	tmp = RT2860_RTSTH_EN | RT2860_PROT_NAV_SHORT | RT2860_TXOP_ALLOW_ALL;
 	/* setup protection frame rate (MCS code) */
 	tmp |= (ic->ic_curmode == IEEE80211_MODE_11A) ?
@@ -2693,6 +2748,7 @@ rt2860_updateedca(struct ieee80211com *ic)
 	struct rt2860_softc *sc = ic->ic_ifp->if_softc;
 	int aci;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	/* update MAC TX configuration registers */
 	for (aci = 0; aci < WME_NUM_AC; aci++) {
 		RAL_WRITE(sc, RT2860_EDCA_AC_CFG(aci),
@@ -2738,6 +2794,7 @@ rt2860_set_key(struct ieee80211com *ic, const struct ieee80211_key *ck,
 	uint8_t mode, wcid, iv[8];
 	struct ieee80211_key *k = __UNCONST(ck); /* XXX */
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	/* map net80211 cipher to RT2860 security mode */
 	switch (k->wk_cipher->ic_cipher) {
 	case IEEE80211_CIPHER_WEP:
@@ -2835,6 +2892,7 @@ rt2860_delete_key(struct ieee80211com *ic, const struct ieee80211_key *k)
 	uint32_t attr;
 	uint8_t wcid;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	if (k->wk_flags & IEEE80211_KEY_GROUP) {
 		/* remove group key */
 		attr = RAL_READ(sc, RT2860_SKEY_MODE_0_7);
@@ -2858,6 +2916,7 @@ rt2860_rssi2dbm(struct rt2860_softc *sc, uint8_t rssi, uint8_t rxchain)
 	struct ieee80211_channel *c = ic->ic_ibss_chan;
 	int delta;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	if (IEEE80211_IS_CHAN_5GHZ(c)) {
 		u_int chan = ieee80211_chan2ieee(ic, c);
 		delta = sc->rssi_5ghz[rxchain];
@@ -2884,6 +2943,7 @@ b4inc(uint32_t b32, int8_t delta)
 {
 	int8_t i, b4;
 
+	aprint_normal("in %s\n", __FUNCTION__);
 	for (i = 0; i < 8; i++) {
 		b4 = b32 & 0xf;
 		b4 += delta;
@@ -2899,6 +2959,7 @@ b4inc(uint32_t b32, int8_t delta)
 const char *
 rt2860_get_rf(uint8_t rev)
 {
+	aprint_normal("in %s\n", __FUNCTION__);
 	switch (rev) {
 	case RT2860_RF_2820:	return "RT2820";
 	case RT2860_RF_2850:	return "RT2850";
@@ -2924,6 +2985,7 @@ rt2860_read_eeprom(struct rt2860_softc *sc)
 	uint16_t val;
 	int ridx, ant, i;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	/* check whether the ROM is eFUSE ROM or EEPROM */
 	sc->sc_srom_read = rt2860_eeprom_read_2;
 	if (sc->mac_ver >= 0x3071) {
@@ -3234,6 +3296,7 @@ rt2860_bbp_init(struct rt2860_softc *sc)
 {
 	int i, ntries;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	/* wait for BBP to wake up */
 	for (ntries = 0; ntries < 20; ntries++) {
 		uint8_t bbp0 = rt2860_mcu_bbp_read(sc, 0);
@@ -3274,6 +3337,7 @@ rt2860_txrx_enable(struct rt2860_softc *sc)
 	uint32_t tmp;
 	int ntries;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	/* enable Tx/Rx DMA engine */
 	RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, RT2860_MAC_TX_EN);
 	RAL_BARRIER_READ_WRITE(sc);
@@ -3322,6 +3386,7 @@ rt2860_init(struct ifnet *ifp)
 	uint8_t bbp1, bbp3;
 	int i, qid, ridx, ntries, error;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	/* for CardBus, power on the socket */
 	if (!(sc->sc_flags & RT2860_ENABLED)) {
 		if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) {
@@ -3591,6 +3656,7 @@ rt2860_stop(struct ifnet *ifp, int disable)
 	uint32_t tmp;
 	int qid;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	if (ifp->if_flags & IFF_RUNNING)
 		rt2860_set_leds(sc, 0);	/* turn all LEDs off */
 
@@ -3637,6 +3703,7 @@ rt2860_load_microcode(struct rt2860_softc *sc)
 {
 	int ntries;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	/* set "host program ram write selection" bit */
 	RAL_WRITE(sc, RT2860_SYS_CTRL, RT2860_HST_PM_SEL);
 	/* write microcode image */
@@ -3676,6 +3743,7 @@ rt2860_calib(struct rt2860_softc *sc)
 	uint8_t step, bbp49;
 	int8_t ridx, d;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	/* read current temperature */
 	bbp49 = rt2860_mcu_bbp_read(sc, 49);
 
@@ -3715,6 +3783,7 @@ rt3090_set_rx_antenna(struct rt2860_softc *sc, int aux)
 {
 	uint32_t tmp;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	if (aux) {
 		tmp = RAL_READ(sc, RT2860_PCI_EECTRL);
 		RAL_WRITE(sc, RT2860_PCI_EECTRL, tmp & ~RT2860_C);
@@ -3734,6 +3803,7 @@ rt2860_switch_chan(struct rt2860_softc *sc, struct ieee80211_channel *c)
 	struct ieee80211com *ic = &sc->sc_ic;
 	u_int chan, group;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	chan = ieee80211_chan2ieee(ic, c);
 	if (chan == 0 || chan == IEEE80211_CHAN_ANY)
 		return;
@@ -3768,6 +3838,7 @@ rt2860_setup_beacon(struct rt2860_softc *sc)
 	struct mbuf *m;
 	int ridx;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	if ((m = ieee80211_beacon_alloc(ic, ic->ic_bss, &sc->sc_bo)) == NULL)
 		return ENOBUFS;
 
@@ -3801,6 +3872,7 @@ rt2860_enable_tsf_sync(struct rt2860_softc *sc)
 	struct ieee80211com *ic = &sc->sc_ic;
 	uint32_t tmp;
 
+	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	tmp = RAL_READ(sc, RT2860_BCN_TIME_CFG);
 
 	tmp &= ~0x1fffff;
-- 
2.5.2


From d02721cb50a25d6902a0ec6cc4440fd59de30f38 Mon Sep 17 00:00:00 2001
From: Jeff Rizzo <riz@tastylime.net>
Date: Sun, 20 Dec 2015 15:01:24 -0800
Subject: [PATCH 15/18] Declare local functions static, and #if 0 out some
 unused code.

---
 sys/dev/ic/rt2860.c | 258 +++++++++++++++++++++++++++-------------------------
 1 file changed, 132 insertions(+), 126 deletions(-)

diff --git a/sys/dev/ic/rt2860.c b/sys/dev/ic/rt2860.c
index 12cf29d..7de9c93 100644
--- a/sys/dev/ic/rt2860.c
+++ b/sys/dev/ic/rt2860.c
@@ -70,90 +70,94 @@ int rt2860_debug = 0;
 #define DPRINTFN(n, x)
 #endif
 
-void		rt2860_attachhook(struct device *);
-int		rt2860_alloc_tx_ring(struct rt2860_softc *,
+static void	rt2860_attachhook(struct device *);
+static int	rt2860_alloc_tx_ring(struct rt2860_softc *,
 		    struct rt2860_tx_ring *);
-void		rt2860_reset_tx_ring(struct rt2860_softc *,
+static void	rt2860_reset_tx_ring(struct rt2860_softc *,
 		    struct rt2860_tx_ring *);
-void		rt2860_free_tx_ring(struct rt2860_softc *,
+static void	rt2860_free_tx_ring(struct rt2860_softc *,
 		    struct rt2860_tx_ring *);
-int		rt2860_alloc_tx_pool(struct rt2860_softc *);
-void		rt2860_free_tx_pool(struct rt2860_softc *);
-int		rt2860_alloc_rx_ring(struct rt2860_softc *,
+static int	rt2860_alloc_tx_pool(struct rt2860_softc *);
+static void	rt2860_free_tx_pool(struct rt2860_softc *);
+static int	rt2860_alloc_rx_ring(struct rt2860_softc *,
 		    struct rt2860_rx_ring *);
-void		rt2860_reset_rx_ring(struct rt2860_softc *,
+static void	rt2860_reset_rx_ring(struct rt2860_softc *,
 		    struct rt2860_rx_ring *);
-void		rt2860_free_rx_ring(struct rt2860_softc *,
+static void	rt2860_free_rx_ring(struct rt2860_softc *,
 		    struct rt2860_rx_ring *);
-struct		ieee80211_node *rt2860_node_alloc(struct ieee80211_node_table *);
+static struct	ieee80211_node *rt2860_node_alloc(struct ieee80211_node_table *);
 static int	rt2860_media_change(struct ifnet *);
-void		rt2860_iter_func(void *, struct ieee80211_node *);
-void		rt2860_updatestats(struct rt2860_softc *);
-void		rt2860_newassoc(struct ieee80211_node *,
+static void	rt2860_iter_func(void *, struct ieee80211_node *);
+static void	rt2860_updatestats(struct rt2860_softc *);
+static void	rt2860_newassoc(struct ieee80211_node *,
 		    int);
-int		rt2860_ampdu_rx_start(struct ieee80211com *,
+#ifndef IEEE80211_NO_HT
+static int	rt2860_ampdu_rx_start(struct ieee80211com *,
 		    struct ieee80211_node *, uint8_t);
-void		rt2860_ampdu_rx_stop(struct ieee80211com *,
+static void	rt2860_ampdu_rx_stop(struct ieee80211com *,
 		    struct ieee80211_node *, uint8_t);
-int		rt2860_newstate(struct ieee80211com *, enum ieee80211_state,
+#endif
+static int	rt2860_newstate(struct ieee80211com *, enum ieee80211_state,
 		    int);
-uint16_t	rt3090_efuse_read_2(struct rt2860_softc *, uint16_t);
-uint16_t	rt2860_eeprom_read_2(struct rt2860_softc *, uint16_t);
-void		rt2860_intr_coherent(struct rt2860_softc *);
-void		rt2860_drain_stats_fifo(struct rt2860_softc *);
-void		rt2860_tx_intr(struct rt2860_softc *, int);
-void		rt2860_rx_intr(struct rt2860_softc *);
-void		rt2860_tbtt_intr(struct rt2860_softc *);
-void		rt2860_gp_intr(struct rt2860_softc *);
-int		rt2860_tx(struct rt2860_softc *, struct mbuf *,
+static uint16_t	rt3090_efuse_read_2(struct rt2860_softc *, uint16_t);
+static uint16_t	rt2860_eeprom_read_2(struct rt2860_softc *, uint16_t);
+static void	rt2860_intr_coherent(struct rt2860_softc *);
+static void	rt2860_drain_stats_fifo(struct rt2860_softc *);
+static void	rt2860_tx_intr(struct rt2860_softc *, int);
+static void	rt2860_rx_intr(struct rt2860_softc *);
+static void	rt2860_tbtt_intr(struct rt2860_softc *);
+static void	rt2860_gp_intr(struct rt2860_softc *);
+static int	rt2860_tx(struct rt2860_softc *, struct mbuf *,
 		    struct ieee80211_node *);
-void		rt2860_start(struct ifnet *);
-void		rt2860_watchdog(struct ifnet *);
-int		rt2860_ioctl(struct ifnet *, u_long, void *);
-void		rt2860_mcu_bbp_write(struct rt2860_softc *, uint8_t, uint8_t);
-uint8_t		rt2860_mcu_bbp_read(struct rt2860_softc *, uint8_t);
-void		rt2860_rf_write(struct rt2860_softc *, uint8_t, uint32_t);
-uint8_t		rt3090_rf_read(struct rt2860_softc *, uint8_t);
-void		rt3090_rf_write(struct rt2860_softc *, uint8_t, uint8_t);
-int		rt2860_mcu_cmd(struct rt2860_softc *, uint8_t, uint16_t, int);
-void		rt2860_enable_mrr(struct rt2860_softc *);
-void		rt2860_set_txpreamble(struct rt2860_softc *);
-void		rt2860_set_basicrates(struct rt2860_softc *);
-void		rt2860_select_chan_group(struct rt2860_softc *, int);
-void		rt2860_set_chan(struct rt2860_softc *, u_int);
-void		rt3090_set_chan(struct rt2860_softc *, u_int);
-int		rt3090_rf_init(struct rt2860_softc *);
-void		rt3090_rf_wakeup(struct rt2860_softc *);
-int		rt3090_filter_calib(struct rt2860_softc *, uint8_t, uint8_t,
+static void	rt2860_start(struct ifnet *);
+static void	rt2860_watchdog(struct ifnet *);
+static int	rt2860_ioctl(struct ifnet *, u_long, void *);
+static void	rt2860_mcu_bbp_write(struct rt2860_softc *, uint8_t, uint8_t);
+static uint8_t	rt2860_mcu_bbp_read(struct rt2860_softc *, uint8_t);
+static void	rt2860_rf_write(struct rt2860_softc *, uint8_t, uint32_t);
+static uint8_t	rt3090_rf_read(struct rt2860_softc *, uint8_t);
+static void	rt3090_rf_write(struct rt2860_softc *, uint8_t, uint8_t);
+static int	rt2860_mcu_cmd(struct rt2860_softc *, uint8_t, uint16_t, int);
+static void	rt2860_enable_mrr(struct rt2860_softc *);
+static void	rt2860_set_txpreamble(struct rt2860_softc *);
+static void	rt2860_set_basicrates(struct rt2860_softc *);
+static void	rt2860_select_chan_group(struct rt2860_softc *, int);
+static void	rt2860_set_chan(struct rt2860_softc *, u_int);
+static void	rt3090_set_chan(struct rt2860_softc *, u_int);
+static int	rt3090_rf_init(struct rt2860_softc *);
+static void	rt3090_rf_wakeup(struct rt2860_softc *);
+static int	rt3090_filter_calib(struct rt2860_softc *, uint8_t, uint8_t,
 		    uint8_t *);
-void		rt3090_rf_setup(struct rt2860_softc *);
-void		rt2860_set_leds(struct rt2860_softc *, uint16_t);
-void		rt2860_set_gp_timer(struct rt2860_softc *, int);
-void		rt2860_set_bssid(struct rt2860_softc *, const uint8_t *);
-void		rt2860_set_macaddr(struct rt2860_softc *, const uint8_t *);
-void		rt2860_updateslot(struct ifnet *);
-void		rt2860_updateprot(struct ieee80211com *);
+static void	rt3090_rf_setup(struct rt2860_softc *);
+static void	rt2860_set_leds(struct rt2860_softc *, uint16_t);
+static void	rt2860_set_gp_timer(struct rt2860_softc *, int);
+static void	rt2860_set_bssid(struct rt2860_softc *, const uint8_t *);
+static void	rt2860_set_macaddr(struct rt2860_softc *, const uint8_t *);
+static void	rt2860_updateslot(struct ifnet *);
+static void	rt2860_updateprot(struct ieee80211com *);
 static int	rt2860_updateedca(struct ieee80211com *);
 static int	rt2860_set_key(struct ieee80211com *, 
 		    const struct ieee80211_key *, const uint8_t *);
 static int	rt2860_delete_key(struct ieee80211com *,
 		    const struct ieee80211_key *);
-int8_t		rt2860_rssi2dbm(struct rt2860_softc *, uint8_t, uint8_t);
-const char *	rt2860_get_rf(uint8_t);
-int		rt2860_read_eeprom(struct rt2860_softc *);
-int		rt2860_bbp_init(struct rt2860_softc *);
-int		rt2860_txrx_enable(struct rt2860_softc *);
-int		rt2860_init(struct ifnet *);
-void		rt2860_stop(struct ifnet *, int);
-int		rt2860_load_microcode(struct rt2860_softc *);
-void		rt2860_calib(struct rt2860_softc *);
-void		rt3090_set_rx_antenna(struct rt2860_softc *, int);
-void		rt2860_switch_chan(struct rt2860_softc *,
+static int8_t	rt2860_rssi2dbm(struct rt2860_softc *, uint8_t, uint8_t);
+static const char *	rt2860_get_rf(uint8_t);
+static int	rt2860_read_eeprom(struct rt2860_softc *);
+static int	rt2860_bbp_init(struct rt2860_softc *);
+static int	rt2860_txrx_enable(struct rt2860_softc *);
+static int	rt2860_init(struct ifnet *);
+static void	rt2860_stop(struct ifnet *, int);
+static int	rt2860_load_microcode(struct rt2860_softc *);
+#if 0
+static void	rt2860_calib(struct rt2860_softc *);
+#endif
+static void	rt3090_set_rx_antenna(struct rt2860_softc *, int);
+static void	rt2860_switch_chan(struct rt2860_softc *,
 		    struct ieee80211_channel *);
 #ifndef IEEE80211_STA_ONLY
-int		rt2860_setup_beacon(struct rt2860_softc *);
+static int	rt2860_setup_beacon(struct rt2860_softc *);
 #endif
-void		rt2860_enable_tsf_sync(struct rt2860_softc *);
+static void	rt2860_enable_tsf_sync(struct rt2860_softc *);
 
 static const struct {
 	uint32_t	reg;
@@ -292,7 +296,7 @@ firmware_load(const char *dname, const char *iname, uint8_t **ucodep,
 	return (error);
 }
 
-void
+static void
 rt2860_attachhook(struct device *self)
 {
 	struct rt2860_softc *sc = (struct rt2860_softc *)self;
@@ -439,7 +443,7 @@ rt2860_wakeup(void *xsc)
 		rt2860_init(ifp);
 }
 
-int
+static int
 rt2860_alloc_tx_ring(struct rt2860_softc *sc, struct rt2860_tx_ring *ring)
 {
 	int nsegs, size, error;
@@ -487,7 +491,7 @@ fail:	rt2860_free_tx_ring(sc, ring);
 	return error;
 }
 
-void
+static void
 rt2860_reset_tx_ring(struct rt2860_softc *sc, struct rt2860_tx_ring *ring)
 {
 	struct rt2860_tx_data *data;
@@ -513,7 +517,7 @@ rt2860_reset_tx_ring(struct rt2860_softc *sc, struct rt2860_tx_ring *ring)
 	ring->cur = ring->next = 0;
 }
 
-void
+static void
 rt2860_free_tx_ring(struct rt2860_softc *sc, struct rt2860_tx_ring *ring)
 {
 	struct rt2860_tx_data *data;
@@ -547,7 +551,7 @@ rt2860_free_tx_ring(struct rt2860_softc *sc, struct rt2860_tx_ring *ring)
 /*
  * Allocate a pool of TX Wireless Information blocks.
  */
-int
+static int
 rt2860_alloc_tx_pool(struct rt2860_softc *sc)
 {
 	uintptr_t vaddr;
@@ -619,7 +623,7 @@ fail:	rt2860_free_tx_pool(sc);
 	return error;
 }
 
-void
+static void
 rt2860_free_tx_pool(struct rt2860_softc *sc)
 {
 	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
@@ -642,7 +646,7 @@ rt2860_free_tx_pool(struct rt2860_softc *sc)
 	}
 }
 
-int
+static int
 rt2860_alloc_rx_ring(struct rt2860_softc *sc, struct rt2860_rx_ring *ring)
 {
 	int i, nsegs, size, error;
@@ -731,7 +735,7 @@ fail:	rt2860_free_rx_ring(sc, ring);
 	return error;
 }
 
-void
+static void
 rt2860_reset_rx_ring(struct rt2860_softc *sc, struct rt2860_rx_ring *ring)
 {
 	int i;
@@ -746,7 +750,7 @@ rt2860_reset_rx_ring(struct rt2860_softc *sc, struct rt2860_rx_ring *ring)
 	ring->cur = 0;
 }
 
-void
+static void
 rt2860_free_rx_ring(struct rt2860_softc *sc, struct rt2860_rx_ring *ring)
 {
 	int i;
@@ -777,7 +781,7 @@ rt2860_free_rx_ring(struct rt2860_softc *sc, struct rt2860_rx_ring *ring)
 	}
 }
 
-struct ieee80211_node *
+static struct ieee80211_node *
 rt2860_node_alloc(struct ieee80211_node_table *nt)
 {
 	aprint_normal("in %s\n", __FUNCTION__);
@@ -816,7 +820,7 @@ rt2860_media_change(struct ifnet *ifp)
 	return 0;
 }
 
-void
+static void
 rt2860_iter_func(void *arg, struct ieee80211_node *ni)
 {
 	struct rt2860_softc *sc = arg;
@@ -826,7 +830,7 @@ rt2860_iter_func(void *arg, struct ieee80211_node *ni)
 	ieee80211_amrr_choose(&sc->amrr, ni, &sc->amn[wcid]);
 }
 
-void
+static void
 rt2860_updatestats(struct rt2860_softc *sc)
 {
 	struct ieee80211com *ic = &sc->sc_ic;
@@ -861,7 +865,7 @@ rt2860_updatestats(struct rt2860_softc *sc)
 #endif
 }
 
-void
+static void
 rt2860_newassoc(struct ieee80211_node *ni, int isnew)
 {
 	struct rt2860_softc *sc = ni->ni_ic->ic_ifp->if_softc;
@@ -912,7 +916,7 @@ rt2860_newassoc(struct ieee80211_node *ni, int isnew)
 }
 
 #ifndef IEEE80211_NO_HT
-int
+static int
 rt2860_ampdu_rx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
     uint8_t tid)
 {
@@ -928,7 +932,7 @@ rt2860_ampdu_rx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
 	return 0;
 }
 
-void
+static void
 rt2860_ampdu_rx_stop(struct ieee80211com *ic, struct ieee80211_node *ni,
     uint8_t tid)
 {
@@ -944,7 +948,7 @@ rt2860_ampdu_rx_stop(struct ieee80211com *ic, struct ieee80211_node *ni,
 }
 #endif
 
-int
+static int
 rt2860_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
 {
 	struct rt2860_softc *sc = ic->ic_ifp->if_softc;
@@ -1022,7 +1026,7 @@ rt2860_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
 }
 
 /* Read 16-bit from eFUSE ROM (>=RT3071 only.) */
-uint16_t
+static uint16_t
 rt3090_efuse_read_2(struct rt2860_softc *sc, uint16_t addr)
 {
 	uint32_t tmp;
@@ -1064,7 +1068,7 @@ rt3090_efuse_read_2(struct rt2860_softc *sc, uint16_t addr)
  * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46,
  * 93C66 or 93C86).
  */
-uint16_t
+static uint16_t
 rt2860_eeprom_read_2(struct rt2860_softc *sc, uint16_t addr)
 {
 	uint32_t tmp;
@@ -1127,7 +1131,7 @@ rt2860_srom_read(struct rt2860_softc *sc, uint8_t addr)
 	return sc->sc_srom_read(sc, addr);
 }
 
-void
+static void
 rt2860_intr_coherent(struct rt2860_softc *sc)
 {
 	uint32_t tmp;
@@ -1145,7 +1149,7 @@ rt2860_intr_coherent(struct rt2860_softc *sc)
 	(void)rt2860_txrx_enable(sc);
 }
 
-void
+static void
 rt2860_drain_stats_fifo(struct rt2860_softc *sc)
 {
 	struct ifnet *ifp = &sc->sc_if;
@@ -1185,7 +1189,7 @@ rt2860_drain_stats_fifo(struct rt2860_softc *sc)
 	}
 }
 
-void
+static void
 rt2860_tx_intr(struct rt2860_softc *sc, int qid)
 {
 	struct ifnet *ifp = &sc->sc_if;
@@ -1242,7 +1246,7 @@ rt2860_maxrssi_chain(struct rt2860_softc *sc, const struct rt2860_rxwi *rxwi)
 	return rxchain;
 }
 
-void
+static void
 rt2860_rx_intr(struct rt2860_softc *sc)
 {
 	struct ieee80211com *ic = &sc->sc_ic;
@@ -1414,7 +1418,7 @@ skip:		rxd->sdl0 &= ~htole16(RT2860_RX_DDONE);
 	    (sc->rxq.cur - 1) % RT2860_RX_RING_COUNT);
 }
 
-void
+static void
 rt2860_tbtt_intr(struct rt2860_softc *sc)
 {
 	struct ieee80211com *ic = &sc->sc_ic;
@@ -1445,7 +1449,7 @@ rt2860_tbtt_intr(struct rt2860_softc *sc)
 	}
 }
 
-void
+static void
 rt2860_gp_intr(struct rt2860_softc *sc)
 {
 	struct ieee80211com *ic = &sc->sc_ic;
@@ -1513,7 +1517,7 @@ rt2860_intr(void *arg)
 	return 1;
 }
 
-int
+static int
 rt2860_tx(struct rt2860_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
 {
 	struct ieee80211com *ic = &sc->sc_ic;
@@ -1757,7 +1761,7 @@ rt2860_tx(struct rt2860_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
 	return 0;
 }
 
-void
+static void
 rt2860_start(struct ifnet *ifp)
 {
 	struct rt2860_softc *sc = ifp->if_softc;
@@ -1824,7 +1828,7 @@ sendit:
 	}
 }
 
-void
+static void
 rt2860_watchdog(struct ifnet *ifp)
 {
 	struct rt2860_softc *sc = ifp->if_softc;
@@ -1847,7 +1851,7 @@ rt2860_watchdog(struct ifnet *ifp)
 	ieee80211_watchdog(ic);
 }
 
-int
+static int
 rt2860_ioctl(struct ifnet *ifp, u_long cmd, void *data)
 {
 	struct rt2860_softc *sc = ifp->if_softc;
@@ -1906,7 +1910,7 @@ rt2860_ioctl(struct ifnet *ifp, u_long cmd, void *data)
  * We access the BBP through the 8051 microcontroller unit which means that
  * the microcode must be loaded first.
  */
-void
+static void
 rt2860_mcu_bbp_write(struct rt2860_softc *sc, uint8_t reg, uint8_t val)
 {
 	int ntries;
@@ -1931,7 +1935,7 @@ rt2860_mcu_bbp_write(struct rt2860_softc *sc, uint8_t reg, uint8_t val)
 	DELAY(1000);
 }
 
-uint8_t
+static uint8_t
 rt2860_mcu_bbp_read(struct rt2860_softc *sc, uint8_t reg)
 {
 	uint32_t val;
@@ -1970,7 +1974,7 @@ rt2860_mcu_bbp_read(struct rt2860_softc *sc, uint8_t reg)
 /*
  * Write to one of the 4 programmable 24-bit RF registers.
  */
-void
+static void
 rt2860_rf_write(struct rt2860_softc *sc, uint8_t reg, uint32_t val)
 {
 	uint32_t tmp;
@@ -1993,7 +1997,7 @@ rt2860_rf_write(struct rt2860_softc *sc, uint8_t reg, uint32_t val)
 	RAL_WRITE(sc, RT2860_RF_CSR_CFG0, tmp);
 }
 
-uint8_t
+static uint8_t
 rt3090_rf_read(struct rt2860_softc *sc, uint8_t reg)
 {
 	uint32_t tmp;
@@ -2025,7 +2029,7 @@ rt3090_rf_read(struct rt2860_softc *sc, uint8_t reg)
 	return tmp & 0xff;
 }
 
-void
+static void
 rt3090_rf_write(struct rt2860_softc *sc, uint8_t reg, uint8_t val)
 {
 	uint32_t tmp;
@@ -2048,7 +2052,7 @@ rt3090_rf_write(struct rt2860_softc *sc, uint8_t reg, uint8_t val)
 /*
  * Send a command to the 8051 microcontroller unit.
  */
-int
+static int
 rt2860_mcu_cmd(struct rt2860_softc *sc, uint8_t cmd, uint16_t arg, int wait)
 {
 	int slot, ntries;
@@ -2099,7 +2103,7 @@ rt2860_mcu_cmd(struct rt2860_softc *sc, uint8_t cmd, uint16_t arg, int wait)
 	return (tmp == 1) ? 0 : EIO;
 }
 
-void
+static void
 rt2860_enable_mrr(struct rt2860_softc *sc)
 {
 	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
@@ -2124,7 +2128,7 @@ rt2860_enable_mrr(struct rt2860_softc *sc)
 #undef CCK
 }
 
-void
+static void
 rt2860_set_txpreamble(struct rt2860_softc *sc)
 {
 	uint32_t tmp;
@@ -2137,7 +2141,7 @@ rt2860_set_txpreamble(struct rt2860_softc *sc)
 	RAL_WRITE(sc, RT2860_AUTO_RSP_CFG, tmp);
 }
 
-void
+static void
 rt2860_set_basicrates(struct rt2860_softc *sc)
 {
 	struct ieee80211com *ic = &sc->sc_ic;
@@ -2152,7 +2156,7 @@ rt2860_set_basicrates(struct rt2860_softc *sc)
 		RAL_WRITE(sc, RT2860_LEGACY_BASIC_RATE, 0x15f);
 }
 
-void
+static void
 rt2860_select_chan_group(struct rt2860_softc *sc, int group)
 {
 	uint32_t tmp;
@@ -2247,7 +2251,7 @@ rt2860_select_chan_group(struct rt2860_softc *sc, int group)
 	DELAY(1000);
 }
 
-void
+static void
 rt2860_set_chan(struct rt2860_softc *sc, u_int chan)
 {
 	const struct rfprog *rfprog = rt2860_rf2850;
@@ -2303,7 +2307,7 @@ rt2860_set_chan(struct rt2860_softc *sc, u_int chan)
 	rt2860_rf_write(sc, RT2860_RF4, r4);
 }
 
-void
+static void
 rt3090_set_chan(struct rt2860_softc *sc, u_int chan)
 {
 	int8_t txpow1, txpow2;
@@ -2368,7 +2372,7 @@ rt3090_set_chan(struct rt2860_softc *sc, u_int chan)
 	rt3090_rf_write(sc, 7, rf | RT3070_TUNE);
 }
 
-int
+static int
 rt3090_rf_init(struct rt2860_softc *sc)
 {
 	uint32_t tmp;
@@ -2484,7 +2488,7 @@ rt3090_rf_init(struct rt2860_softc *sc)
 	return 0;
 }
 
-void
+static void
 rt3090_rf_wakeup(struct rt2860_softc *sc)
 {
 	uint32_t tmp;
@@ -2551,7 +2555,7 @@ rt3090_rf_wakeup(struct rt2860_softc *sc)
 	}
 }
 
-int
+static int
 rt3090_filter_calib(struct rt2860_softc *sc, uint8_t init, uint8_t target,
     uint8_t *val)
 {
@@ -2617,7 +2621,7 @@ rt3090_filter_calib(struct rt2860_softc *sc, uint8_t init, uint8_t target,
 	return 0;
 }
 
-void
+static void
 rt3090_rf_setup(struct rt2860_softc *sc)
 {
 	uint8_t bbp;
@@ -2648,7 +2652,7 @@ rt3090_rf_setup(struct rt2860_softc *sc)
 	}
 }
 
-void
+static void
 rt2860_set_leds(struct rt2860_softc *sc, uint16_t which)
 {
 	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
@@ -2660,7 +2664,7 @@ rt2860_set_leds(struct rt2860_softc *sc, uint16_t which)
  * Hardware has a general-purpose programmable timer interrupt that can
  * periodically raise MAC_INT_4.
  */
-void
+static void
 rt2860_set_gp_timer(struct rt2860_softc *sc, int ms)
 {
 	uint32_t tmp;
@@ -2683,7 +2687,7 @@ rt2860_set_gp_timer(struct rt2860_softc *sc, int ms)
 	RAL_WRITE(sc, RT2860_INT_TIMER_EN, tmp | RT2860_GP_TIMER_EN);
 }
 
-void
+static void
 rt2860_set_bssid(struct rt2860_softc *sc, const uint8_t *bssid)
 {
 	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
@@ -2693,7 +2697,7 @@ rt2860_set_bssid(struct rt2860_softc *sc, const uint8_t *bssid)
 	    bssid[4] | bssid[5] << 8);
 }
 
-void
+static void
 rt2860_set_macaddr(struct rt2860_softc *sc, const uint8_t *addr)
 {
 	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
@@ -2703,7 +2707,7 @@ rt2860_set_macaddr(struct rt2860_softc *sc, const uint8_t *addr)
 	    addr[4] | addr[5] << 8 | 0xff << 16);
 }
 
-void
+static void
 rt2860_updateslot(struct ifnet *ifp)
 {
 	struct rt2860_softc *sc = ifp->if_softc;
@@ -2717,7 +2721,7 @@ rt2860_updateslot(struct ifnet *ifp)
 	RAL_WRITE(sc, RT2860_BKOFF_SLOT_CFG, tmp);
 }
 
-void
+static void
 rt2860_updateprot(struct ieee80211com *ic)
 {
 	struct rt2860_softc *sc = ic->ic_ifp->if_softc;
@@ -2909,7 +2913,7 @@ rt2860_delete_key(struct ieee80211com *ic, const struct ieee80211_key *k)
 	return 1;
 }
 
-int8_t
+static int8_t
 rt2860_rssi2dbm(struct rt2860_softc *sc, uint8_t rssi, uint8_t rxchain)
 {
 	struct ieee80211com *ic = &sc->sc_ic;
@@ -2956,7 +2960,7 @@ b4inc(uint32_t b32, int8_t delta)
 	return b32;
 }
 
-const char *
+static const char *
 rt2860_get_rf(uint8_t rev)
 {
 	aprint_normal("in %s\n", __FUNCTION__);
@@ -2976,7 +2980,7 @@ rt2860_get_rf(uint8_t rev)
 	}
 }
 
-int
+static int
 rt2860_read_eeprom(struct rt2860_softc *sc)
 {
 	struct ieee80211com *ic = &sc->sc_ic;
@@ -3291,7 +3295,7 @@ rt2860_read_eeprom(struct rt2860_softc *sc)
 	return 0;
 }
 
-int
+static int
 rt2860_bbp_init(struct rt2860_softc *sc)
 {
 	int i, ntries;
@@ -3331,7 +3335,7 @@ rt2860_bbp_init(struct rt2860_softc *sc)
 	return 0;
 }
 
-int
+static int
 rt2860_txrx_enable(struct rt2860_softc *sc)
 {
 	uint32_t tmp;
@@ -3377,7 +3381,7 @@ rt2860_txrx_enable(struct rt2860_softc *sc)
 	return 0;
 }
 
-int
+static int
 rt2860_init(struct ifnet *ifp)
 {
 	struct rt2860_softc *sc = ifp->if_softc;
@@ -3648,7 +3652,7 @@ rt2860_init(struct ifnet *ifp)
 	return 0;
 }
 
-void
+static void
 rt2860_stop(struct ifnet *ifp, int disable)
 {
 	struct rt2860_softc *sc = ifp->if_softc;
@@ -3698,7 +3702,7 @@ rt2860_stop(struct ifnet *ifp, int disable)
 	}
 }
 
-int
+static int
 rt2860_load_microcode(struct rt2860_softc *sc)
 {
 	int ntries;
@@ -3731,11 +3735,12 @@ rt2860_load_microcode(struct rt2860_softc *sc)
 	return 0;
 }
 
+#if 0
 /*
  * This function is called periodically to adjust Tx power based on
  * temperature variation.
  */
-void
+static void
 rt2860_calib(struct rt2860_softc *sc)
 {
 	struct ieee80211com *ic = &sc->sc_ic;
@@ -3777,8 +3782,9 @@ rt2860_calib(struct rt2860_softc *sc)
 		    b4inc(sc->txpow20mhz[ridx], d));
 	}
 }
+#endif /* 0 */
 
-void
+static void
 rt3090_set_rx_antenna(struct rt2860_softc *sc, int aux)
 {
 	uint32_t tmp;
@@ -3797,7 +3803,7 @@ rt3090_set_rx_antenna(struct rt2860_softc *sc, int aux)
 	}
 }
 
-void
+static void
 rt2860_switch_chan(struct rt2860_softc *sc, struct ieee80211_channel *c)
 {
 	struct ieee80211com *ic = &sc->sc_ic;
@@ -3830,7 +3836,7 @@ rt2860_switch_chan(struct rt2860_softc *sc, struct ieee80211_channel *c)
 }
 
 #ifndef IEEE80211_STA_ONLY
-int
+static int
 rt2860_setup_beacon(struct rt2860_softc *sc)
 {
 	struct ieee80211com *ic = &sc->sc_ic;
@@ -3866,7 +3872,7 @@ rt2860_setup_beacon(struct rt2860_softc *sc)
 }
 #endif
 
-void
+static void
 rt2860_enable_tsf_sync(struct rt2860_softc *sc)
 {
 	struct ieee80211com *ic = &sc->sc_ic;
-- 
2.5.2


From 5bd1d4d1efd221f5763b821bc8b63931babdbc77 Mon Sep 17 00:00:00 2001
From: Jeff Rizzo <riz@tastylime.net>
Date: Sun, 20 Dec 2015 15:12:52 -0800
Subject: [PATCH 16/18] Remove RAL_DEBUG #define in favor of a kernel config
 option.

---
 sys/dev/ic/rt2860.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/sys/dev/ic/rt2860.c b/sys/dev/ic/rt2860.c
index 7de9c93..96fecbc 100644
--- a/sys/dev/ic/rt2860.c
+++ b/sys/dev/ic/rt2860.c
@@ -60,7 +60,6 @@ __KERNEL_RCSID(0, "$NetBSD$");
 
 #include <dev/pci/pcidevs.h>
 
-#define RAL_DEBUG
 #ifdef RAL_DEBUG
 #define DPRINTF(x)	do { if (rt2860_debug > 0) printf x; } while (0)
 #define DPRINTFN(n, x)	do { if (rt2860_debug >= (n)) printf x; } while (0)
-- 
2.5.2


From fb664d530cc7dba031ebb41da0b947ce169208a7 Mon Sep 17 00:00:00 2001
From: Jeff Rizzo <riz@tastylime.net>
Date: Sun, 20 Dec 2015 15:17:45 -0800
Subject: [PATCH 17/18] Kernel config for testing ral(4)

---
 sys/arch/amd64/conf/RALTEST | 6 ++++++
 1 file changed, 6 insertions(+)
 create mode 100644 sys/arch/amd64/conf/RALTEST

diff --git a/sys/arch/amd64/conf/RALTEST b/sys/arch/amd64/conf/RALTEST
new file mode 100644
index 0000000..78db4b7
--- /dev/null
+++ b/sys/arch/amd64/conf/RALTEST
@@ -0,0 +1,6 @@
+include	"arch/amd64/conf/GENERIC"
+
+options 	DEBUG,LOCKDEBUG
+options 	RAL_DEBUG
+options 	DDB_TEE_MSGBUF=1
+makeoptions	DEBUG="-g"
-- 
2.5.2


From c2c395b6d363d1854a86ae81b95384bbacb64354 Mon Sep 17 00:00:00 2001
From: Jeff Rizzo <riz@tastylime.net>
Date: Sun, 7 Feb 2016 19:39:46 -0800
Subject: [PATCH 18/18] Debugging printfs;  commit them mostly to save for
 later.

---
 sys/dev/ic/rt2860.c | 11 +++++++++++
 sys/net/if.c        |  6 +++++-
 2 files changed, 16 insertions(+), 1 deletion(-)

diff --git a/sys/dev/ic/rt2860.c b/sys/dev/ic/rt2860.c
index 96fecbc..5efdd11 100644
--- a/sys/dev/ic/rt2860.c
+++ b/sys/dev/ic/rt2860.c
@@ -1860,17 +1860,28 @@ rt2860_ioctl(struct ifnet *ifp, u_long cmd, void *data)
 	aprint_normal_dev(sc->sc_dev, "in %s\n", __FUNCTION__);
 	s = splnet();
 
+	aprint_normal_dev(sc->sc_dev, "past debugger1 in %s\n", __FUNCTION__);
+	Debugger();
+	
 	switch (cmd) {
 	case SIOCSIFFLAGS:
 		if ((error = ifioctl_common(ifp, cmd, data)) != 0)
 			break;
+		aprint_normal_dev(sc->sc_dev, "entering switch in %s", __FUNCTION__);
+		Debugger();
 		switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) {
 		case IFF_UP|IFF_RUNNING:
+		  aprint_normal_dev(sc->sc_dev, "no flags in %s", __FUNCTION__);
+		Debugger();
 			break;
 		case IFF_UP:
+		  aprint_normal_dev(sc->sc_dev, "about to _init in %s", __FUNCTION__);
+		Debugger();
 			rt2860_init(ifp);
 			break;
 		case IFF_RUNNING:
+		  aprint_normal_dev(sc->sc_dev, "about to _stop in %s", __FUNCTION__);
+		Debugger();
 			rt2860_stop(ifp, 1);
 			break;
 		case 0:
diff --git a/sys/net/if.c b/sys/net/if.c
index 39c05a3..f139880 100644
--- a/sys/net/if.c
+++ b/sys/net/if.c
@@ -1554,7 +1554,7 @@ if_up(struct ifnet *ifp)
 	struct ifaddr *ifa;
 #endif
 	struct domain *dp;
-
+printf("in if_up %s\n", ifp->if_xname);
 	ifp->if_flags |= IFF_UP;
 	nanotime(&ifp->if_lastchange);
 #ifdef notyet
@@ -1689,6 +1689,7 @@ ifioctl_common(struct ifnet *ifp, u_long cmd, void *data)
 	struct ifcapreq *ifcr;
 	struct ifdatareq *ifdr;
 
+printf("in ifioctl_common() for %s\n", ifp->if_xname);
 	switch (cmd) {
 	case SIOCSIFCAP:
 		ifcr = data;
@@ -1741,14 +1742,17 @@ ifioctl_common(struct ifnet *ifp, u_long cmd, void *data)
 			return ENETRESET;
 		return 0;
 	case SIOCSIFFLAGS:
+printf("in ifioctl_common() SIOCSIFFLAGS\n");
 		ifr = data;
 		if (ifp->if_flags & IFF_UP && (ifr->ifr_flags & IFF_UP) == 0) {
 			s = splnet();
+printf("in ifioctl_common() calling if_down\n");
 			if_down(ifp);
 			splx(s);
 		}
 		if (ifr->ifr_flags & IFF_UP && (ifp->if_flags & IFF_UP) == 0) {
 			s = splnet();
+printf("in ifioctl_common() calling if_up\n");
 			if_up(ifp);
 			splx(s);
 		}
-- 
2.5.2

